Import Mbed OS hard-float snapshot
This commit is contained in:
86
TESTS/mbed_hal_fpga_ci_test_shield/i2c/i2c_fpga_test.h
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86
TESTS/mbed_hal_fpga_ci_test_shield/i2c/i2c_fpga_test.h
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/* mbed Microcontroller Library
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* Copyright (c) 2019 ARM Limited
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/** \addtogroup hal_GeneralI2C_tests */
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/** @{*/
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#ifndef MBED_FPGA_I2C_TEST_H
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#define MBED_FPGA_I2C_TEST_H
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#if DEVICE_I2C
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Test that the i2c-master can be initialized/de-initialized using all possible
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* i2c pins.
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*
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* Given board provides i2c-master support.
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* When i2c-master is initialized (and then de-initialized) using valid set of i2c pins.
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* Then the operation is successfull.
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*
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*/
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void fpga_test_i2c_init_free(PinName sda, PinName scl);
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/** Test that I2C master is able to read data from I2C bus using i2c_byte_read.
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*
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* Given board provides I2C master support.
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* When I2C master reads data from I2C bus using i2c_byte_read.
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* Then data is successfully read.
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*
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*/
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void fpga_i2c_test_byte_read(PinName sda, PinName scl);
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/** Test that I2C master is able to write data to I2C bus using i2c_byte_write.
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*
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* Given board provides I2C master support.
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* When I2C master writes data to the I2C bus using i2c_byte_write.
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* Then data is successfully transmitted.
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*
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*/
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void fpga_i2c_test_byte_write(PinName sda, PinName scl);
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/** Test that I2C master is able to read data from I2C bus using i2c_read.
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*
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* Given board provides I2C master support.
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* When I2C master reads data from I2C bus using i2c_read.
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* Then data is successfully read.
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*
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*/
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void fpga_i2c_test_read(PinName sda, PinName scl);
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/** Test that I2C master is able to write data to I2C bus using i2c_write.
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*
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* Given board provides I2C master support.
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* When I2C master writes data to the I2C bus using i2c_write.
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* Then data is successfully transmitted.
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*
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*/
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void fpga_i2c_test_write(PinName sda, PinName scl);
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/**@}*/
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif
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/**@}*/
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471
TESTS/mbed_hal_fpga_ci_test_shield/i2c/main.cpp
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471
TESTS/mbed_hal_fpga_ci_test_shield/i2c/main.cpp
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/*
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* Copyright (c) 2019, Arm Limited and affiliates.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#if !DEVICE_I2C
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#error [NOT_SUPPORTED] I2C not supported for this target
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#elif !COMPONENT_FPGA_CI_TEST_SHIELD
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#error [NOT_SUPPORTED] FPGA CI Test Shield is needed to run this test
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#elif !defined(TARGET_FF_ARDUINO) && !defined(MBED_CONF_TARGET_DEFAULT_FORM_FACTOR)
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#error [NOT_SUPPORTED] Test not supported for this form factor
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#else
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#include "utest/utest.h"
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#include "unity/unity.h"
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#include "greentea-client/test_env.h"
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#include "mbed.h"
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#include "i2c_api.h"
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#include "pinmap.h"
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#include "hal/static_pinmap.h"
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#include "test_utils.h"
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#include "I2CTester.h"
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#include "i2c_fpga_test.h"
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using namespace utest::v1;
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#define NACK 0
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#define ACK 1
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#define TIMEOUT 2
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#define I2C_DEV_ADDR 0x98//default i2c slave address on FPGA is 0x98 until modified
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const int TRANSFER_COUNT = 300;
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I2CTester tester(DefaultFormFactor::pins(), DefaultFormFactor::restricted_pins());
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void fpga_test_i2c_init_free(PinName sda, PinName scl)
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{
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i2c_t obj = {};
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memset(&obj, 0, sizeof(obj));
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i2c_init(&obj, sda, scl);
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i2c_frequency(&obj, 100000);
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i2c_free(&obj);
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}
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template<bool init_direct>
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void fpga_i2c_test_write(PinName sda, PinName scl)
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{
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// Remap pins for test
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tester.reset();
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tester.pin_map_set(sda, MbedTester::LogicalPinI2CSda);
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tester.pin_map_set(scl, MbedTester::LogicalPinI2CScl);
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tester.pin_set_pull(sda, MbedTester::PullUp);
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tester.pin_set_pull(scl, MbedTester::PullUp);
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// Initialize mbed I2C pins
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i2c_t i2c;
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memset(&i2c, 0, sizeof(i2c));
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if (init_direct) {
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#if STATIC_PINMAP_READY
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const i2c_pinmap_t pinmap = get_i2c_pinmap(sda, scl);
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i2c_init_direct(&i2c, &pinmap);
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#else
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//skip this test case if static pinmap is not supported
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return;
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#endif
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} else {
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i2c_init(&i2c, sda, scl);
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}
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i2c_frequency(&i2c, 100000);
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// Reset tester stats and select I2C
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tester.peripherals_reset();
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tester.select_peripheral(I2CTester::PeripheralI2C);
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// Data out and in buffers and initialization
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uint8_t data_out[TRANSFER_COUNT];
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for (int i = 0; i < TRANSFER_COUNT; i++) {
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data_out[i] = i & 0xFF;
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}
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uint8_t data_in[TRANSFER_COUNT];
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for (int i = 0; i < TRANSFER_COUNT; i++) {
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data_in[i] = 0;
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}
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int num_writes;
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int num_reads;
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int num_acks;
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int num_nacks;
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int num_starts;
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int num_stops;
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uint32_t checksum;
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int num_dev_addr_matches;
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int ack_nack;//0 if NACK was received, 1 if ACK was received, 2 for timeout
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// Reset tester stats and select I2C
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tester.peripherals_reset();
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tester.select_peripheral(MbedTester::PeripheralI2C);
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// Write data for I2C complete transaction
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// Will write 0-(TRANSFER_COUNT-1) to FPGA, checksum must match checksum calculated in parallel on FPGA
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num_dev_addr_matches = 0;
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num_writes = 0;
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num_reads = 0;
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num_starts = 0;
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num_stops = 0;
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num_acks = 0;
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num_nacks = 0;
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checksum = 0;
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num_writes = i2c_write(&i2c, I2C_DEV_ADDR, (char *)data_out, TRANSFER_COUNT, true); //transaction ends with a stop condition
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num_acks = num_writes + 1;
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num_starts += 1;
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num_stops += 1;
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num_dev_addr_matches += 1;
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for (int i = 0; i < TRANSFER_COUNT; i++) {
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checksum += data_out[i];
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}
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// Verify that the transfer was successful
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TEST_ASSERT_EQUAL(num_dev_addr_matches, tester.num_dev_addr_matches());
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TEST_ASSERT_EQUAL(TRANSFER_COUNT, num_writes);
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TEST_ASSERT_EQUAL(num_writes + 1, tester.transfer_count());
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TEST_ASSERT_EQUAL(num_starts, tester.num_starts());
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TEST_ASSERT_EQUAL(num_stops, tester.num_stops());
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TEST_ASSERT_EQUAL(num_acks, tester.num_acks());
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TEST_ASSERT_EQUAL(num_nacks, tester.num_nacks());
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TEST_ASSERT_EQUAL(checksum, tester.get_receive_checksum());
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TEST_ASSERT_EQUAL(0, tester.state_num());
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TEST_ASSERT_EQUAL(data_out[TRANSFER_COUNT - 4], tester.get_prev_to_slave_4());
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TEST_ASSERT_EQUAL(data_out[TRANSFER_COUNT - 3], tester.get_prev_to_slave_3());
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TEST_ASSERT_EQUAL(data_out[TRANSFER_COUNT - 2], tester.get_prev_to_slave_2());
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TEST_ASSERT_EQUAL(data_out[TRANSFER_COUNT - 1], tester.get_prev_to_slave_1());
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TEST_ASSERT_EQUAL(num_writes, tester.num_writes());
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TEST_ASSERT_EQUAL(num_reads, tester.num_reads());
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tester.reset();
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tester.pin_set_pull(sda, MbedTester::PullNone);
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tester.pin_set_pull(scl, MbedTester::PullNone);
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i2c_free(&i2c);
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}
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template<bool init_direct>
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void fpga_i2c_test_read(PinName sda, PinName scl)
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{
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// Remap pins for test
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tester.reset();
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tester.pin_map_set(sda, MbedTester::LogicalPinI2CSda);
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tester.pin_map_set(scl, MbedTester::LogicalPinI2CScl);
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tester.pin_set_pull(sda, MbedTester::PullUp);
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tester.pin_set_pull(scl, MbedTester::PullUp);
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// Initialize mbed I2C pins
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i2c_t i2c;
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memset(&i2c, 0, sizeof(i2c));
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if (init_direct) {
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const i2c_pinmap_t pinmap = get_i2c_pinmap(sda, scl);
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i2c_init_direct(&i2c, &pinmap);
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} else {
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i2c_init(&i2c, sda, scl);
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}
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i2c_frequency(&i2c, 100000);
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// Reset tester stats and select I2C
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tester.peripherals_reset();
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tester.select_peripheral(I2CTester::PeripheralI2C);
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// Data out and in buffers and initialization
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uint8_t data_out[TRANSFER_COUNT];
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for (int i = 0; i < TRANSFER_COUNT; i++) {
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data_out[i] = i & 0xFF;
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}
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uint8_t data_in[TRANSFER_COUNT];
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for (int i = 0; i < TRANSFER_COUNT; i++) {
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data_in[i] = 0;
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}
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int num_writes;
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int num_reads;
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int num_acks;
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int num_nacks;
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int num_starts;
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int num_stops;
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uint32_t checksum;
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int num_dev_addr_matches;
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int ack_nack;//0 if NACK was received, 1 if ACK was received, 2 for timeout
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// Reset tester stats and select I2C
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tester.peripherals_reset();
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tester.select_peripheral(MbedTester::PeripheralI2C);
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// Read data for I2C complete transaction
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// Will read <TRANSFER_COUNT> bytes, checksum must match checksum calculated in parallel on FPGA
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num_dev_addr_matches = 0;
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num_writes = 0;
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num_reads = 0;
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num_starts = 0;
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num_stops = 0;
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num_acks = 0;
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num_nacks = 0;
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checksum = 0;
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num_reads = i2c_read(&i2c, (I2C_DEV_ADDR | 1), (char *)data_in, TRANSFER_COUNT, true); //transaction ends with a stop condition
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num_starts += 1;
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num_stops += 1;
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num_acks += 1;
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num_acks += TRANSFER_COUNT - 1;
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num_nacks += 1;
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num_dev_addr_matches += 1;
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for (int i = 0; i < TRANSFER_COUNT; i++) {
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checksum += data_in[i];
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}
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// Verify that the transfer was successful
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TEST_ASSERT_EQUAL(num_dev_addr_matches, tester.num_dev_addr_matches());
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TEST_ASSERT_EQUAL(TRANSFER_COUNT, num_reads);
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TEST_ASSERT_EQUAL(num_reads + 1, tester.transfer_count());
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TEST_ASSERT_EQUAL(num_starts, tester.num_starts());
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TEST_ASSERT_EQUAL(num_stops, tester.num_stops());
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TEST_ASSERT_EQUAL(num_acks, tester.num_acks());
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TEST_ASSERT_EQUAL(num_nacks, tester.num_nacks());
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TEST_ASSERT_EQUAL(checksum, tester.get_send_checksum());
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TEST_ASSERT_EQUAL(0, tester.state_num());
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TEST_ASSERT_EQUAL(((TRANSFER_COUNT + 1) & 0xFF), tester.get_next_from_slave());
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TEST_ASSERT_EQUAL(num_writes, tester.num_writes());
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TEST_ASSERT_EQUAL(num_reads, tester.num_reads());
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tester.reset();
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tester.pin_set_pull(sda, MbedTester::PullNone);
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tester.pin_set_pull(scl, MbedTester::PullNone);
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i2c_free(&i2c);
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}
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void fpga_i2c_test_byte_write(PinName sda, PinName scl)
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{
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// Remap pins for test
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tester.reset();
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tester.pin_map_set(sda, MbedTester::LogicalPinI2CSda);
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tester.pin_map_set(scl, MbedTester::LogicalPinI2CScl);
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tester.pin_set_pull(sda, MbedTester::PullUp);
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tester.pin_set_pull(scl, MbedTester::PullUp);
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// Initialize mbed I2C pins
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i2c_t i2c;
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memset(&i2c, 0, sizeof(i2c));
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i2c_init(&i2c, sda, scl);
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i2c_frequency(&i2c, 100000);
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// Reset tester stats and select I2C
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tester.peripherals_reset();
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tester.select_peripheral(I2CTester::PeripheralI2C);
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// Data out and in buffers and initialization
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uint8_t data_out[TRANSFER_COUNT];
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for (int i = 0; i < TRANSFER_COUNT; i++) {
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data_out[i] = i & 0xFF;
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}
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uint8_t data_in[TRANSFER_COUNT];
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for (int i = 0; i < TRANSFER_COUNT; i++) {
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data_in[i] = 0;
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}
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int num_writes;
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int num_reads;
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int num_acks;
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int num_nacks;
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int num_starts;
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int num_stops;
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uint32_t checksum;
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int num_dev_addr_matches;
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int ack_nack;//0 if NACK was received, 1 if ACK was received, 2 for timeout
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// Reset tester stats and select I2C
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tester.peripherals_reset();
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tester.select_peripheral(MbedTester::PeripheralI2C);
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// Write data for I2C single byte transfers
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// Will write 0-(TRANSFER_COUNT-1) to FPGA, checksum must match checksum calculated in parallel on FPGA
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num_dev_addr_matches = 0;
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num_writes = 0;
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num_reads = 0;
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num_starts = 0;
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num_stops = 0;
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num_acks = 0;
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num_nacks = 0;
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checksum = 0;
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i2c_start(&i2c);//start condition
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num_starts += 1;
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i2c_byte_write(&i2c, I2C_DEV_ADDR);//send device address
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num_dev_addr_matches += 1;
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num_acks += 1;
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for (int i = 0; i < TRANSFER_COUNT; i++) {
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ack_nack = i2c_byte_write(&i2c, data_out[i]);//send data
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if (ack_nack == ACK) {
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num_acks += 1;
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} else if (ack_nack == NACK) {
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num_nacks += 1;
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} else {
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printf("Timeout error\n\r");
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}
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checksum += data_out[i];
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num_writes += 1;
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}
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i2c_stop(&i2c);
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num_stops += 1;
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// Verify that the transfer was successful
|
||||
TEST_ASSERT_EQUAL(num_dev_addr_matches, tester.num_dev_addr_matches());
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TEST_ASSERT_EQUAL(TRANSFER_COUNT, num_writes);
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TEST_ASSERT_EQUAL(num_writes + 1, tester.transfer_count());
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TEST_ASSERT_EQUAL(num_starts, tester.num_starts());
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TEST_ASSERT_EQUAL(num_stops, tester.num_stops());
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TEST_ASSERT_EQUAL(num_acks, tester.num_acks());
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TEST_ASSERT_EQUAL(num_nacks, tester.num_nacks());
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TEST_ASSERT_EQUAL(checksum, tester.get_receive_checksum());
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TEST_ASSERT_EQUAL(0, tester.state_num());
|
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TEST_ASSERT_EQUAL(data_out[TRANSFER_COUNT - 4], tester.get_prev_to_slave_4());
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TEST_ASSERT_EQUAL(data_out[TRANSFER_COUNT - 3], tester.get_prev_to_slave_3());
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||||
TEST_ASSERT_EQUAL(data_out[TRANSFER_COUNT - 2], tester.get_prev_to_slave_2());
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||||
TEST_ASSERT_EQUAL(data_out[TRANSFER_COUNT - 1], tester.get_prev_to_slave_1());
|
||||
TEST_ASSERT_EQUAL(num_writes, tester.num_writes());
|
||||
TEST_ASSERT_EQUAL(num_reads, tester.num_reads());
|
||||
|
||||
tester.reset();
|
||||
tester.pin_set_pull(sda, MbedTester::PullNone);
|
||||
tester.pin_set_pull(scl, MbedTester::PullNone);
|
||||
i2c_free(&i2c);
|
||||
}
|
||||
|
||||
void fpga_i2c_test_byte_read(PinName sda, PinName scl)
|
||||
{
|
||||
// Remap pins for test
|
||||
tester.reset();
|
||||
tester.pin_map_set(sda, MbedTester::LogicalPinI2CSda);
|
||||
tester.pin_map_set(scl, MbedTester::LogicalPinI2CScl);
|
||||
|
||||
tester.pin_set_pull(sda, MbedTester::PullUp);
|
||||
tester.pin_set_pull(scl, MbedTester::PullUp);
|
||||
|
||||
// Initialize mbed I2C pins
|
||||
i2c_t i2c;
|
||||
memset(&i2c, 0, sizeof(i2c));
|
||||
i2c_init(&i2c, sda, scl);
|
||||
i2c_frequency(&i2c, 100000);
|
||||
|
||||
// Reset tester stats and select I2C
|
||||
tester.peripherals_reset();
|
||||
tester.select_peripheral(I2CTester::PeripheralI2C);
|
||||
|
||||
// Data out and in buffers and initialization
|
||||
uint8_t data_out[TRANSFER_COUNT];
|
||||
for (int i = 0; i < TRANSFER_COUNT; i++) {
|
||||
data_out[i] = i & 0xFF;
|
||||
}
|
||||
uint8_t data_in[TRANSFER_COUNT];
|
||||
for (int i = 0; i < TRANSFER_COUNT; i++) {
|
||||
data_in[i] = 0;
|
||||
}
|
||||
|
||||
int num_writes;
|
||||
int num_reads;
|
||||
int num_acks;
|
||||
int num_nacks;
|
||||
int num_starts;
|
||||
int num_stops;
|
||||
uint32_t checksum;
|
||||
int num_dev_addr_matches;
|
||||
int ack_nack;//0 if NACK was received, 1 if ACK was received, 2 for timeout
|
||||
|
||||
// Reset tester stats and select I2C
|
||||
tester.peripherals_reset();
|
||||
tester.select_peripheral(MbedTester::PeripheralI2C);
|
||||
tester.set_next_from_slave(0);
|
||||
for (int i = 0; i < TRANSFER_COUNT; i++) {
|
||||
data_in[i] = 0;
|
||||
}
|
||||
|
||||
// Read data for I2C single byte transfers
|
||||
// Will read <TRANSFER_COUNT> bytes, checksum must match checksum calculated in parallel on FPGA
|
||||
num_dev_addr_matches = 0;
|
||||
num_writes = 0;
|
||||
num_reads = 0;
|
||||
num_starts = 0;
|
||||
num_stops = 0;
|
||||
num_acks = 0;
|
||||
num_nacks = 0;
|
||||
checksum = 0;
|
||||
|
||||
i2c_start(&i2c);//start condition
|
||||
num_starts += 1;
|
||||
i2c_byte_write(&i2c, (I2C_DEV_ADDR | 1));//send device address for reading
|
||||
num_dev_addr_matches += 1;
|
||||
num_acks += 1;
|
||||
for (int i = 0; i < TRANSFER_COUNT; i++) {
|
||||
if (num_reads == (TRANSFER_COUNT - 1)) {
|
||||
data_in[i] = i2c_byte_read(&i2c, 1);//send NACK
|
||||
checksum += data_in[i];
|
||||
num_reads += 1;
|
||||
num_nacks += 1;
|
||||
} else {
|
||||
data_in[i] = i2c_byte_read(&i2c, 0);//send ACK
|
||||
checksum += data_in[i];
|
||||
num_reads += 1;
|
||||
num_acks += 1;
|
||||
}
|
||||
}
|
||||
|
||||
i2c_stop(&i2c);
|
||||
num_stops += 1;
|
||||
|
||||
// Verify that the transfer was successful
|
||||
TEST_ASSERT_EQUAL(num_dev_addr_matches, tester.num_dev_addr_matches());
|
||||
TEST_ASSERT_EQUAL(TRANSFER_COUNT, num_reads);
|
||||
TEST_ASSERT_EQUAL(num_reads + 1, tester.transfer_count());
|
||||
TEST_ASSERT_EQUAL(num_starts, tester.num_starts());
|
||||
TEST_ASSERT_EQUAL(num_stops, tester.num_stops());
|
||||
TEST_ASSERT_EQUAL(num_acks, tester.num_acks());
|
||||
TEST_ASSERT_EQUAL(num_nacks, tester.num_nacks());
|
||||
TEST_ASSERT_EQUAL(checksum, tester.get_send_checksum());
|
||||
TEST_ASSERT_EQUAL(0, tester.state_num());
|
||||
TEST_ASSERT_EQUAL(((TRANSFER_COUNT) & 0xFF), tester.get_next_from_slave());
|
||||
TEST_ASSERT_EQUAL(num_writes, tester.num_writes());
|
||||
TEST_ASSERT_EQUAL(num_reads, tester.num_reads());
|
||||
|
||||
tester.reset();
|
||||
tester.pin_set_pull(sda, MbedTester::PullNone);
|
||||
tester.pin_set_pull(scl, MbedTester::PullNone);
|
||||
i2c_free(&i2c);
|
||||
}
|
||||
|
||||
Case cases[] = {
|
||||
Case("i2c - init/free test all pins", all_ports<I2CPort, DefaultFormFactor, fpga_test_i2c_init_free>),
|
||||
Case("i2c - test write i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_write<false>>),
|
||||
Case("i2c (direct init) - test write i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_write<true>>),
|
||||
Case("i2c - test read i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_read<false>>),
|
||||
Case("i2c (direct init) - test read i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_read<true>>),
|
||||
Case("i2c - test single byte write i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_byte_write>),
|
||||
Case("i2c - test single byte read i2c API", all_peripherals<I2CPort, DefaultFormFactor, fpga_i2c_test_byte_read>)
|
||||
};
|
||||
|
||||
utest::v1::status_t greentea_test_setup(const size_t number_of_cases)
|
||||
{
|
||||
GREENTEA_SETUP(30, "default_auto");
|
||||
return greentea_test_setup_handler(number_of_cases);
|
||||
}
|
||||
|
||||
Specification specification(greentea_test_setup, cases, greentea_test_teardown_handler);
|
||||
|
||||
int main()
|
||||
{
|
||||
Harness::run(specification);
|
||||
}
|
||||
|
||||
#endif /* !DEVICE_I2C */
|
||||
Reference in New Issue
Block a user