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Import Mbed OS hard-float snapshot

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Beslan
2026-06-01 20:15:04 +03:00
commit d3738e2f89
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124
platform/source/TARGET_CORTEX_M/TOOLCHAIN_ARM/except.S Normal file
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;/*
; * Copyright (c) 2014-2018 ARM Limited. All rights reserved.
; *
; * SPDX-License-Identifier: Apache-2.0
; *
; * Licensed under the Apache License, Version 2.0 (the License); you may
; * not use this file except in compliance with the License.
; * You may obtain a copy of the License at
; *
; * www.apache.org/licenses/LICENSE-2.0
; *
; * Unless required by applicable law or agreed to in writing, software
; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; * See the License for the specific language governing permissions and
; * limitations under the License.
; *
; * -----------------------------------------------------------------------------
; *
; * Title: Cortex-M Fault Exception handlers ( Common for both ARMv7M and ARMV6M )
; *
; * -----------------------------------------------------------------------------
; */
#ifndef MBED_FAULT_HANDLER_DISABLED
#ifndef DOMAIN_NS
#define DOMAIN_NS 1
#endif
FAULT_TYPE_HARD_FAULT EQU 0x10
FAULT_TYPE_MEMMANAGE_FAULT EQU 0x20
FAULT_TYPE_BUS_FAULT EQU 0x30
FAULT_TYPE_USAGE_FAULT EQU 0x40
PRESERVE8
THUMB
AREA |.text|, CODE, READONLY
HardFault_Handler\
PROC
EXPORT HardFault_Handler
MOVS R3,#FAULT_TYPE_HARD_FAULT
B Fault_Handler
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler
MOVS R3,#FAULT_TYPE_MEMMANAGE_FAULT
B Fault_Handler
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler
MOVS R3,#FAULT_TYPE_BUS_FAULT
B Fault_Handler
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler
MOVS R3,#FAULT_TYPE_USAGE_FAULT
; Fall into Fault_Handler
ENDP
Fault_Handler\
PROC
EXPORT Fault_Handler
#if (DOMAIN_NS == 1)
#if MBED_CONF_PLATFORM_CRASH_CAPTURE_ENABLED
#define mbed_fault_context |Image$$RW_m_crash_data$$ZI$$Base|
#endif
IMPORT mbed_fault_context
IMPORT mbed_fault_handler
MOV R12,R3
PUSH {R4-R7}
ADD R6,SP,#16
MOV R5,LR
LSRS R0,R5,#3 ; Check EXC_RETURN for bit 2
BCC Fault_Handler_Continue
MRS R6,PSP
Fault_Handler_Continue
LDR R7,=mbed_fault_context
LDMIA R6!,{R0-R3}
STMIA R7!,{R0-R3} ; Capture R0..R3
POP {R0-R3}
STMIA R7!,{R0-R3} ; Capture R4..R7
MOV R0,R8
MOV R1,R9
MOV R2,R10
MOV R3,R11
STMIA R7!,{R0-R3} ; Capture R8..R11
LDMIA R6!,{R0,R2-R4} ; Load R12,LR,PC,xPSR
; Adjust stack pointer to its original value
MOVS R1,R6
LSRS R6,R4,#10 ; Check for if STK was aligned by checking bit-9 in xPSR value
BCC Fault_Handler_Continue1
ADDS R1,#0x4
Fault_Handler_Continue1
LSRS R6,R5,#5 ; Check EXC_RETURN bit-4 to see if FP context was saved
BCS Fault_Handler_Continue2
ADDS R1,#0x48 ; 16 FP regs + FPCSR + 1 Reserved
Fault_Handler_Continue2
STMIA R7!,{R0-R4} ; Capture R12,SP,LR,PC,xPSR
MRS R0,PSP
MOV R1,SP
MRS R6,CONTROL
STMIA R7!,{R0,R1,R5,R6} ; Capture PSP,MSP,EXC_RETURN,CONTROL
MOV R0,R12
LDR R1,=mbed_fault_context
BL mbed_fault_handler ; mbed_fault_handler does not return
#else
B .
#endif
ENDP
ALIGN
#endif
END

160
platform/source/TARGET_CORTEX_M/TOOLCHAIN_GCC/except.S Normal file
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/*
* Copyright (c) 2014-2018 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* -----------------------------------------------------------------------------
*
* Title: Cortex-M Fault Exception handlers ( Common for both ARMv7M and ARMV6M )
*
* -----------------------------------------------------------------------------
*/
#ifndef MBED_FAULT_HANDLER_DISABLED
.file "except.S"
.syntax unified
#ifndef DOMAIN_NS
#define DOMAIN_NS 1
#endif
.equ FAULT_TYPE_HARD_FAULT, 0x10
.equ FAULT_TYPE_MEMMANAGE_FAULT, 0x20
.equ FAULT_TYPE_BUS_FAULT, 0x30
.equ FAULT_TYPE_USAGE_FAULT, 0x40
.thumb
.section ".text"
.align 2
//HardFault_Handler
.thumb_func
.type HardFault_Handler, %function
.global HardFault_Handler
.fnstart
.cantunwind
HardFault_Handler:
MOVS R3,#FAULT_TYPE_HARD_FAULT
B Fault_Handler
.fnend
.size HardFault_Handler, .-HardFault_Handler
//MemManage_Handler
.thumb_func
.type MemManage_Handler, %function
.global MemManage_Handler
.fnstart
.cantunwind
MemManage_Handler:
MOVS R3,#FAULT_TYPE_MEMMANAGE_FAULT
B Fault_Handler
.fnend
.size MemManage_Handler, .-MemManage_Handler
//BusFault_Handler
.thumb_func
.type BusFault_Handler, %function
.global BusFault_Handler
.fnstart
.cantunwind
BusFault_Handler:
MOVS R3,#FAULT_TYPE_BUS_FAULT
B Fault_Handler
.fnend
.size BusFault_Handler, .-BusFault_Handler
//UsageFault_Handler
.thumb_func
.type UsageFault_Handler, %function
.global UsageFault_Handler
.fnstart
.cantunwind
UsageFault_Handler:
MOVS R3,#FAULT_TYPE_USAGE_FAULT
// Fall into Fault_Handler
.fnend
.size UsageFault_Handler, .-UsageFault_Handler
//Common Fault_Handler to capture the context
.thumb_func
.type Fault_Handler, %function
.global Fault_Handler
.fnstart
.cantunwind
Fault_Handler:
#if (DOMAIN_NS == 1)
#if MBED_CONF_PLATFORM_CRASH_CAPTURE_ENABLED
#define mbed_fault_context __CRASH_DATA_RAM_START__
#endif
MOV R12,R3
PUSH {R4-R7}
ADD R6,SP,#16
MOV R5,LR
LSRS R0,R5,#3 // Check EXC_RETURN for bit 2
BCC Fault_Handler_Continue
MRS R6,PSP
Fault_Handler_Continue:
LDR R7,=mbed_fault_context
LDMIA R6!,{R0-R3}
STMIA R7!,{R0-R3} // Capture R0..R3
POP {R0-R3}
STMIA R7!,{R0-R3} // Capture R4..R7
MOV R0,R8
MOV R1,R9
MOV R2,R10
MOV R3,R11
STMIA R7!,{R0-R3} // Capture R8..R11
LDMIA R6!,{R0,R2-R4} // Load R12,LR,PC,xPSR
// Adjust stack pointer to its original value
MOVS R1,R6
LSRS R6,R4,#10 // Check for if STK was aligned by checking bit-9 in xPSR value
BCC Fault_Handler_Continue1
ADDS R1,#0x4
Fault_Handler_Continue1:
LSRS R6,R5,#5 // Check EXC_RETURN bit-4 to see if FP context was saved
BCS Fault_Handler_Continue2
ADDS R1,#0x48 // 16 FP regs + FPCSR + 1 Reserved
Fault_Handler_Continue2:
STMIA R7!,{R0-R4} // Capture R12,SP,LR,PC,xPSR
MRS R0,PSP
MOV R1,SP
MRS R6,CONTROL
STMIA R7!,{R0,R1,R5,R6} // Capture PSP,MSP,EXC_RETURN,CONTROL
MOV R0,R12
LDR R1,=mbed_fault_context
BL mbed_fault_handler // mbed_fault_handler does not return
#else
B .
#endif
.fnend
.size Fault_Handler, .-Fault_Handler
.align
#endif
.end

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platform/source/TARGET_CORTEX_M/TOOLCHAIN_IAR/cmain.S Normal file
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/**************************************************
*
* Part two of the system initialization code, contains C-level
* initialization, thumb-2 only variant.
*
* $Revision: 59783 $
*
**************************************************/
/* Copyright 2008-2017, IAR Systems AB.
This source code is the property of IAR Systems. The source code may only
be used together with the IAR Embedded Workbench. Redistribution and use
in source and binary forms, with or without modification, is permitted
provided that the following conditions are met:
- Redistributions of source code, in whole or in part, must retain the
above copyright notice, this list of conditions and the disclaimer below.
- IAR Systems name may not be used to endorse or promote products
derived from this software without specific prior written permission.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
; --------------------------------------------------
; Module ?cmain, C-level initialization.
;
SECTION SHT$$PREINIT_ARRAY:CONST:NOROOT(2)
SECTION SHT$$INIT_ARRAY:CONST:NOROOT(2)
SECTION .text:CODE:NOROOT(2)
PUBLIC __cmain
;; Keep ?main for legacy reasons, it is accessed in countless instances of cstartup.s around the world...
PUBLIC ?main
EXTWEAK __iar_data_init3
EXTWEAK __iar_argc_argv
EXTERN __low_level_init
EXTERN __call_ctors
EXTERN main
EXTERN exit
EXTERN __iar_dynamic_initialization
EXTERN mbed_sdk_init
EXTWEAK __mbed_init
EXTERN mbed_main
EXTERN SystemInit
THUMB
__cmain:
?main:
; Initialize segments.
; __segment_init and __low_level_init are assumed to use the same
; instruction set and to be reachable by BL from the ICODE segment
; (it is safest to link them in segment ICODE).
FUNCALL __cmain, __low_level_init
bl __low_level_init
cmp r0,#0
beq ?l1
FUNCALL __cmain, __iar_data_init3
bl __iar_data_init3
MOVS r0,#0 ; No parameters
FUNCALL __cmain, mbed_sdk_init
BL mbed_sdk_init
MOVS r0,#0 ; No parameters
FUNCALL __cmain, __mbed_init
BL __mbed_init
MOVS r0,#0 ; No parameters
FUNCALL __cmain, __iar_dynamic_initialization
BL __iar_dynamic_initialization ; C++ dynamic initialization
?l1:
REQUIRE ?l3
SECTION .text:CODE:NOROOT(2)
PUBLIC _main
PUBLIC _call_main
THUMB
__iar_init$$done: ; Copy initialization is done
?l3:
_call_main:
MOVS r0,#0 ; No parameters
FUNCALL __cmain, __iar_argc_argv
BL __iar_argc_argv ; Maybe setup command line
MOVS r0,#0 ; No parameters
FUNCALL __cmain, mbed_main
BL mbed_main
FUNCALL __cmain, main
BL main
_main:
FUNCALL __cmain, exit
BL exit
END

117
platform/source/TARGET_CORTEX_M/TOOLCHAIN_IAR/except.S Normal file
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;/*
; * Copyright (c) 2014-2018 ARM Limited. All rights reserved.
; *
; * SPDX-License-Identifier: Apache-2.0
; *
; * Licensed under the Apache License, Version 2.0 (the License); you may
; * not use this file except in compliance with the License.
; * You may obtain a copy of the License at
; *
; * www.apache.org/licenses/LICENSE-2.0
; *
; * Unless required by applicable law or agreed to in writing, software
; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; * See the License for the specific language governing permissions and
; * limitations under the License.
; *
; * -----------------------------------------------------------------------------
; *
; * Title: Cortex-M Fault Exception handlers ( Common for both ARMv7M and ARMV6M )
; *
; * -----------------------------------------------------------------------------
; */
NAME except.S
#ifndef MBED_FAULT_HANDLER_DISABLED
#ifndef DOMAIN_NS
#define DOMAIN_NS 1
#endif
FAULT_TYPE_HARD_FAULT EQU 0x10
FAULT_TYPE_MEMMANAGE_FAULT EQU 0x20
FAULT_TYPE_BUS_FAULT EQU 0x30
FAULT_TYPE_USAGE_FAULT EQU 0x40
PRESERVE8
SECTION .text:CODE:NOROOT(2)
THUMB
HardFault_Handler
EXPORT HardFault_Handler
MOVS R3,#FAULT_TYPE_HARD_FAULT
B Fault_Handler
MemManage_Handler
EXPORT MemManage_Handler
MOVS R3,#FAULT_TYPE_MEMMANAGE_FAULT
B Fault_Handler
BusFault_Handler
EXPORT BusFault_Handler
MOVS R3,#FAULT_TYPE_BUS_FAULT
B Fault_Handler
UsageFault_Handler
EXPORT UsageFault_Handler
MOVS R3,#FAULT_TYPE_USAGE_FAULT
; Fall into Fault_Handler
Fault_Handler
EXPORT Fault_Handler
#if (DOMAIN_NS == 1)
#if MBED_CONF_PLATFORM_CRASH_CAPTURE_ENABLED
#define mbed_fault_context __CRASH_DATA_RAM_START__
#endif
IMPORT mbed_fault_context
IMPORT mbed_fault_handler
MOV R12,R3
PUSH {R4-R7}
ADD R6,SP,#16
MOV R5,LR
LSRS R0,R5,#3 ; Check EXC_RETURN for bit 2
BCC Fault_Handler_Continue
MRS R6,PSP
Fault_Handler_Continue
LDR R7,=mbed_fault_context
LDMIA R6!,{R0-R3}
STMIA R7!,{R0-R3} ; Capture R0..R3
POP {R0-R3}
STMIA R7!,{R0-R3} ; Capture R4..R7
MOV R0,R8
MOV R1,R9
MOV R2,R10
MOV R3,R11
STMIA R7!,{R0-R3} ; Capture R8..R11
LDMIA R6!,{R0,R2-R4} ; Load R12,LR,PC,xPSR
; Adjust stack pointer to its original value
MOVS R1,R6
LSRS R6,R4,#10 ; Check for if STK was aligned by checking bit-9 in xPSR value
BCC Fault_Handler_Continue1
ADDS R1,#0x4
Fault_Handler_Continue1
LSRS R6,R5,#5 ; Check EXC_RETURN bit-4 to see if FP context was saved
BCS Fault_Handler_Continue2
ADDS R1,#0x48 ; 16 FP regs + FPCSR + 1 Reserved
Fault_Handler_Continue2
STMIA R7!,{R0-R4} ; Capture R12,SP,LR,PC,xPSR
MRS R0,PSP
MOV R1,SP
MRS R6,CONTROL
STMIA R7!,{R0,R1,R5,R6} ; Capture PSP,MSP,EXC_RETURN,CONTROL
MOV R0,R12
LDR R1,=mbed_fault_context
BL mbed_fault_handler ; mbed_fault_handler does not return
#else
B .
#endif
ALIGNROM 2
#endif
END

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platform/source/TARGET_CORTEX_M/mbed_fault_handler.c Normal file
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/* mbed Microcontroller Library
* Copyright (c) 2006-2018 ARM Limited
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __STDC_FORMAT_MACROS
#define __STDC_FORMAT_MACROS
#endif
#include <inttypes.h>
#include <string.h>
#include "device.h"
#include "mbed_atomic.h"
#include "mbed_error.h"
#include "mbed_interface.h"
#include "mbed_crash_data_offsets.h"
#ifndef MBED_FAULT_HANDLER_DISABLED
#include "mbed_fault_handler.h"
//Functions Prototypes
void print_context_info(void);
#if MBED_CONF_PLATFORM_CRASH_CAPTURE_ENABLED
#define mbed_fault_context MBED_CRASH_DATA.fault.context
#else
mbed_fault_context_t mbed_fault_context;
#endif
extern bool mbed_error_in_progress;
//This is a handler function called from Fault handler to print the error information out.
//This runs in fault context and uses special functions(defined in mbed_rtx_fault_handler.c) to print the information without using C-lib support.
MBED_NORETURN void mbed_fault_handler(uint32_t fault_type, const mbed_fault_context_t *mbed_fault_context_in)
{
mbed_error_status_t faultStatus = MBED_SUCCESS;
/* Need to set the flag to ensure prints do not trigger a "mutex in ISR" trap
* if they're first prints since boot and we have to init the I/O system.
*/
if (!core_util_atomic_exchange_bool(&mbed_error_in_progress, true)) {
mbed_error_printf("\n++ MbedOS Fault Handler ++\n\nFaultType: ");
switch (fault_type) {
case MEMMANAGE_FAULT_EXCEPTION:
mbed_error_printf("MemManageFault");
faultStatus = MBED_ERROR_MEMMANAGE_EXCEPTION;
break;
case BUS_FAULT_EXCEPTION:
mbed_error_printf("BusFault");
faultStatus = MBED_ERROR_BUSFAULT_EXCEPTION;
break;
case USAGE_FAULT_EXCEPTION:
mbed_error_printf("UsageFault");
faultStatus = MBED_ERROR_USAGEFAULT_EXCEPTION;
break;
//There is no way we can hit this code without getting an exception, so we have the default treated like hardfault
case HARD_FAULT_EXCEPTION:
default:
mbed_error_printf("HardFault");
faultStatus = MBED_ERROR_HARDFAULT_EXCEPTION;
break;
}
mbed_error_printf("\n\nContext:");
print_context_info();
mbed_error_printf("\n\n-- MbedOS Fault Handler --\n\n");
core_util_atomic_store_bool(&mbed_error_in_progress, false);
}
//Now call mbed_error, to log the error and halt the system
mbed_error(faultStatus, "Fault exception", (unsigned int)mbed_fault_context_in, NULL, 0);
}
MBED_NOINLINE void print_context_info(void)
{
//Context Regs
for (int i = 0; i < 13; i++) {
mbed_error_printf("\nR%-4d: %08" PRIX32, i, (&mbed_fault_context.R0_reg)[i]);
}
mbed_error_printf("\nSP : %08" PRIX32
"\nLR : %08" PRIX32
"\nPC : %08" PRIX32
"\nxPSR : %08" PRIX32
"\nPSP : %08" PRIX32
"\nMSP : %08" PRIX32, mbed_fault_context.SP_reg, mbed_fault_context.LR_reg, mbed_fault_context.PC_reg,
mbed_fault_context.xPSR, mbed_fault_context.PSP, mbed_fault_context.MSP);
//Capture CPUID to get core/cpu info
mbed_error_printf("\nCPUID: %08" PRIX32, SCB->CPUID);
#if !defined(TARGET_M0) && !defined(TARGET_M0P) && !defined(TARGET_M23)
//Capture fault information registers to infer the cause of exception
mbed_error_printf("\nHFSR : %08" PRIX32
"\nMMFSR: %08" PRIX32
"\nBFSR : %08" PRIX32
"\nUFSR : %08" PRIX32
"\nDFSR : %08" PRIX32
"\nAFSR : %08" PRIX32 ////Split/Capture CFSR into MMFSR, BFSR, UFSR
, SCB->HFSR, (0xFF & SCB->CFSR), ((0xFF00 & SCB->CFSR) >> 8), ((0xFFFF0000 & SCB->CFSR) >> 16), SCB->DFSR, SCB->AFSR);
//Print MMFAR only if its valid as indicated by MMFSR
if ((0xFF & SCB->CFSR) & 0x80) {
mbed_error_printf("\nMMFAR: %08" PRIX32, SCB->MMFAR);
}
//Print BFAR only if its valid as indicated by BFSR
if (((0xFF00 & SCB->CFSR) >> 8) & 0x80) {
mbed_error_printf("\nBFAR : %08" PRIX32, SCB->BFAR);
}
#endif
//Print Mode
if (mbed_fault_context.EXC_RETURN & 0x8) {
mbed_error_printf("\nMode : Thread");
//Print Priv level in Thread mode - We capture CONTROL reg which reflects the privilege.
//Note that the CONTROL register captured still reflects the privilege status of the
//thread mode eventhough we are in Handler mode by the time we capture it.
if (mbed_fault_context.CONTROL & 0x1) {
mbed_error_printf("\nPriv : User");
} else {
mbed_error_printf("\nPriv : Privileged");
}
} else {
mbed_error_printf("\nMode : Handler");
mbed_error_printf("\nPriv : Privileged");
}
//Print Return Stack
if (mbed_fault_context.EXC_RETURN & 0x4) {
mbed_error_printf("\nStack: PSP");
} else {
mbed_error_printf("\nStack: MSP");
}
}
mbed_error_status_t mbed_get_reboot_fault_context(mbed_fault_context_t *fault_context)
{
mbed_error_status_t status = MBED_MAKE_ERROR(MBED_MODULE_PLATFORM, MBED_ERROR_CODE_ITEM_NOT_FOUND);
#if MBED_CONF_PLATFORM_CRASH_CAPTURE_ENABLED
if (fault_context == NULL) {
return MBED_MAKE_ERROR(MBED_MODULE_PLATFORM, MBED_ERROR_CODE_INVALID_ARGUMENT);
}
*fault_context = mbed_fault_context;
status = MBED_SUCCESS;
#endif
return status;
}
#endif //MBED_FAULT_HANDLER_SUPPORT