Import Mbed OS hard-float snapshot
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297
targets/TARGET_Maxim/TARGET_MAX32620C/mxc/spix.c
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297
targets/TARGET_Maxim/TARGET_MAX32620C/mxc/spix.c
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/**
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* @file
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* @brief SPI execute in place driver.
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*/
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/* *****************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*
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* $Date: 2016-09-08 17:31:41 -0500 (Thu, 08 Sep 2016) $
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* $Revision: 24323 $
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*
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**************************************************************************** */
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/* **** Includes **** */
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#include <stddef.h>
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#include "mxc_config.h"
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#include "mxc_assert.h"
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#include "spix.h"
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#include "spix_regs.h"
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/**
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* @ingroup spix
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* @{
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*/
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/* **** Definitions **** */
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#define CMD_CLOCKS 8
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#define ADDR_3BYTE_CLOCKS 24
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#define ADDR_4BYTE_CLOCKS 32
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/***** Globals *****/
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/***** Functions *****/
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/******************************************************************************/
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#if defined ( __GNUC__ )
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#undef IAR_SPIX_PRAGMA //Make sure this is not defined for GCC
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#endif
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#if IAR_SPIX_PRAGMA
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// IAR memory section declaration for the SPIX functions to be loaded in RAM.
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#pragma section=".spix_config"
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#endif
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#if(MXC_SPIX_REV == 0)
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#if defined ( __GNUC__ )
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__attribute__ ((section(".spix_config"), noinline))
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#endif /* __GNUC */
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#if IAR_SPIX_PRAGMA
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#pragma location=".spix_config" // IAR locate function in RAM section .spix_config
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#pragma optimize=no_inline // IAR no inline optimization on this function
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#endif /* IAR_PRAGMA */
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static void SPIX_UpdateFBIgnore()
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{
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// Update the feedback ignore clocks
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uint8_t clocks = 0;
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uint8_t no_cmd_clocks = 0;
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// Adjust the clocks for the command
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if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) ==
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MXC_S_SPIX_FETCH_CTRL_CMD_WIDTH_QUAD_IO) {
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clocks += CMD_CLOCKS/4;
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} else if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) ==
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MXC_S_SPIX_FETCH_CTRL_CMD_WIDTH_DUAL_IO) {
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clocks += CMD_CLOCKS/2;
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} else {
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clocks += CMD_CLOCKS;
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}
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// Adjust the clocks for the address
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if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) ==
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MXC_S_SPIX_FETCH_CTRL_ADDR_WIDTH_QUAD_IO) {
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if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
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clocks += ADDR_4BYTE_CLOCKS/4;
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no_cmd_clocks += ADDR_4BYTE_CLOCKS/4;
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} else {
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clocks += ADDR_3BYTE_CLOCKS/4;
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no_cmd_clocks += ADDR_3BYTE_CLOCKS/4;
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}
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} else if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) ==
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MXC_S_SPIX_FETCH_CTRL_ADDR_WIDTH_DUAL_IO) {
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if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
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clocks += ADDR_4BYTE_CLOCKS/2;
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no_cmd_clocks += ADDR_4BYTE_CLOCKS/2;
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} else {
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clocks += ADDR_3BYTE_CLOCKS/2;
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no_cmd_clocks += ADDR_3BYTE_CLOCKS/2;
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}
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} else {
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if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
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clocks += ADDR_4BYTE_CLOCKS;
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no_cmd_clocks += ADDR_4BYTE_CLOCKS;
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} else {
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clocks += ADDR_3BYTE_CLOCKS;
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no_cmd_clocks += ADDR_3BYTE_CLOCKS;
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}
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}
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// Adjust for the mode clocks
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clocks += ((MXC_SPIX->mode_ctrl & MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS) >>
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MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS_POS);
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// Set the FB Ignore clocks
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MXC_SPIX->sck_fb_ctrl = ((MXC_SPIX->sck_fb_ctrl & ~MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS) |
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(clocks << MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_POS));
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MXC_SPIX->sck_fb_ctrl = ((MXC_SPIX->sck_fb_ctrl & ~MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_NO_CMD) |
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(no_cmd_clocks << MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_NO_CMD_POS));
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}
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#endif /* MXC_SPIX_REV==0 */
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/******************************************************************************/
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#if defined ( __GNUC__ )
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__attribute__ ((section(".spix_config"), noinline))
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#endif /* __GNUC */
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#if IAR_SPIX_PRAGMA
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#pragma location=".spix_config" // IAR locate function in RAM section .spix_config
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#pragma optimize=no_inline // IAR no inline optimization on this function
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#endif /* IAR_SPIX_PRAGMA */
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int SPIX_ConfigClock(const sys_cfg_spix_t *sys_cfg, uint32_t baud, uint8_t sample)
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{
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int err;
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uint32_t spix_clk, clocks;
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// Check the input parameters
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if(sys_cfg == NULL) {
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return E_NULL_PTR;
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}
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// Set system level configurations
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if ((err = SYS_SPIX_Init(sys_cfg, baud)) != E_NO_ERROR) {
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return err;
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}
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// Configure the mode and baud
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spix_clk = SYS_SPIX_GetFreq();
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if(spix_clk <= 0) {
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return E_UNINITIALIZED;
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}
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// Make sure that we can generate this frequency
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clocks = (spix_clk / (2*baud));
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if((clocks <= 0) || (clocks >= 0x10)) {
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return E_BAD_PARAM;
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}
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// Set the baud
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MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg &
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~(MXC_F_SPIX_MASTER_CFG_SCK_HI_CLK | MXC_F_SPIX_MASTER_CFG_SCK_LO_CLK)) |
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(clocks << MXC_F_SPIX_MASTER_CFG_SCK_HI_CLK_POS) |
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(clocks << MXC_F_SPIX_MASTER_CFG_SCK_LO_CLK_POS));
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if(sample != 0) {
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// Use sample mode
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MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT) |
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(sample << MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT_POS));
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MXC_SPIX->sck_fb_ctrl &= ~(MXC_F_SPIX_SCK_FB_CTRL_ENABLE_SCK_FB_MODE |
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MXC_F_SPIX_SCK_FB_CTRL_INVERT_SCK_FB_CLK);
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} else {
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// Use Feedback mode
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MXC_SPIX->master_cfg &= ~(MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT);
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MXC_SPIX->sck_fb_ctrl |= (MXC_F_SPIX_SCK_FB_CTRL_ENABLE_SCK_FB_MODE |
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MXC_F_SPIX_SCK_FB_CTRL_INVERT_SCK_FB_CLK);
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#if(MXC_SPIX_REV == 0)
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SPIX_UpdateFBIgnore();
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#endif
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}
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return E_NO_ERROR;
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}
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/******************************************************************************/
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#if defined ( __GNUC__ )
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__attribute__ ((section(".spix_config"), noinline))
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#endif /* __GNUC */
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#if IAR_SPIX_PRAGMA
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#pragma location=".spix_config" // IAR locate function in RAM section .spix_config
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#pragma optimize=no_inline // IAR no inline optimization on this function
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#endif /* IAR_SPIX_PRAGMA */
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void SPIX_ConfigSlave(uint8_t ssel, uint8_t pol, uint8_t act_delay, uint8_t inact_delay)
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{
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// Set the slave select
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MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~MXC_F_SPIX_MASTER_CFG_SLAVE_SEL) |
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(ssel << MXC_F_SPIX_MASTER_CFG_SLAVE_SEL_POS));
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if(pol != 0) {
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// Active high
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MXC_SPIX->master_cfg &= ~(MXC_F_SPIX_MASTER_CFG_SS_ACT_LO);
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} else {
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// Active low
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MXC_SPIX->master_cfg |= MXC_F_SPIX_MASTER_CFG_SS_ACT_LO;
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}
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// Set the delays
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MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~(MXC_F_SPIX_MASTER_CFG_ACT_DELAY |
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MXC_F_SPIX_MASTER_CFG_INACT_DELAY)) |
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(act_delay << MXC_F_SPIX_MASTER_CFG_ACT_DELAY_POS) |
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(inact_delay << MXC_F_SPIX_MASTER_CFG_INACT_DELAY_POS));
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}
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/******************************************************************************/
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#if defined ( __GNUC__ )
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__attribute__ ((section(".spix_config"), noinline))
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#endif /* __GNUC */
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#if IAR_SPIX_PRAGMA
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#pragma location=".spix_config" // IAR locate function in RAM section .spix_config
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#pragma optimize=no_inline // IAR no inline optimization on this function
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#endif /* IAR_SPIX_PRAGMA */
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void SPIX_ConfigFetch(const spix_fetch_t *fetch)
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{
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// Configure how the SPIX fetches data
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MXC_SPIX->fetch_ctrl = (((fetch->cmd << MXC_F_SPIX_FETCH_CTRL_CMD_VALUE_POS) & MXC_F_SPIX_FETCH_CTRL_CMD_VALUE) |
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((fetch->cmd_width << MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) |
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((fetch->addr_width << MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) |
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((fetch->data_width << MXC_F_SPIX_FETCH_CTRL_DATA_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_DATA_WIDTH) |
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((fetch->addr_size << MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR_POS) & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR));
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// Set the command mode and clocks
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MXC_SPIX->mode_ctrl = (((fetch->mode_clocks << MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS_POS) & MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS) |
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(!!fetch->no_cmd_mode << MXC_F_SPIX_MODE_CTRL_NO_CMD_MODE_POS));
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MXC_SPIX->mode_data = (((fetch->mode_data << MXC_F_SPIX_MODE_DATA_MODE_DATA_BITS_POS) & MXC_F_SPIX_MODE_DATA_MODE_DATA_BITS) |
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MXC_F_SPIX_MODE_DATA_MODE_DATA_OE);
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#if(MXC_SPIX_REV == 0)
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SPIX_UpdateFBIgnore();
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#endif
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}
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/******************************************************************************/
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#if defined ( __GNUC__ )
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__attribute__ ((section(".spix_config"), noinline))
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#endif /* __GNUC */
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#if IAR_SPIX_PRAGMA
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#pragma location=".spix_config" // IAR locate function in RAM section .spix_config
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#pragma optimize=no_inline // IAR no inline optimization on this function
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#endif /* IAR_SPIX_PRAGMA */
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int SPIX_Shutdown(mxc_spix_regs_t *spix)
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{
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int err;
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// Clear system level configurations
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if ((err = SYS_SPIX_Shutdown()) != E_NO_ERROR) {
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return err;
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}
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return E_NO_ERROR;
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}
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