Import Mbed OS hard-float snapshot
This commit is contained in:
Beslan
425
targets/TARGET_Maxim/TARGET_MAX32620C/serial_api.c
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425
targets/TARGET_Maxim/TARGET_MAX32620C/serial_api.c
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/*******************************************************************************
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* Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*******************************************************************************
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*/
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#include <string.h>
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#include "mbed_assert.h"
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#include "cmsis.h"
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#include "serial_api.h"
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#include "gpio_api.h"
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#include "uart.h"
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#include "uart_regs.h"
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#include "ioman_regs.h"
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#include "PeripheralPins.h"
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#define DEFAULT_BAUD 9600
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#define UART_ERRORS (MXC_F_UART_INTFL_RX_FRAMING_ERR | \
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MXC_F_UART_INTFL_RX_PARITY_ERR | \
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MXC_F_UART_INTFL_RX_FIFO_OVERFLOW)
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// Variables for managing the stdio UART
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int stdio_uart_inited = 0;
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serial_t stdio_uart = {0};
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// Variables for interrupt driven
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static uart_irq_handler irq_handler;
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static serial_t *objs[MXC_CFG_UART_INSTANCES];
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static void usurp_pin(PinName, int);
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//******************************************************************************
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void serial_init(serial_t *obj, PinName tx, PinName rx)
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{
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// Determine which uart is associated with each pin
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UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
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UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
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UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
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// Make sure that both pins are pointing to the same uart
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MBED_ASSERT(uart != (UARTName)NC);
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// Set the obj pointer to the proper uart
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obj->uart = (mxc_uart_regs_t*)uart;
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// Set the uart index
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obj->index = MXC_UART_GET_IDX(obj->uart);
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obj->fifo = (mxc_uart_fifo_regs_t*)MXC_UART_GET_BASE_FIFO(obj->index);
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// Record the pins requested
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obj->tx = tx;
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obj->rx = rx;
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// Merge pin function requests for use with CMSIS init func
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ioman_req_t io_req = {0};
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pin_function_t *pin_func = NULL;
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if (tx != NC) {
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pin_func = (pin_function_t *)pinmap_find_function(tx, PinMap_UART_TX);
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io_req.value = pin_func->req_val;
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}
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if (rx != NC) {
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pin_func = (pin_function_t *)pinmap_find_function(rx, PinMap_UART_RX);
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io_req.value |= pin_func->req_val;
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}
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// Using req and ack pointers of last pin function lookup
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obj->sys_cfg.io_cfg.req_reg = pin_func->reg_req;
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obj->sys_cfg.io_cfg.ack_reg = pin_func->reg_ack;
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obj->sys_cfg.io_cfg.req_val = io_req;
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obj->sys_cfg.clk_scale = CLKMAN_SCALE_DIV_8;
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// Configure the UART with default parameters
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obj->cfg.extra_stop = 0;
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obj->cfg.cts = 0;
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obj->cfg.rts = 0;
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obj->cfg.baud = DEFAULT_BAUD;
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obj->cfg.size = UART_DATA_SIZE_8_BITS;
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obj->cfg.parity = UART_PARITY_DISABLE;
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// Manage stdio UART
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if (uart == STDIO_UART) {
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stdio_uart_inited = 1;
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stdio_uart = *obj;
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}
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int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
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MBED_ASSERT(retval == E_NO_ERROR);
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objs[obj->index] = obj;
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}
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//******************************************************************************
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void serial_baud(serial_t *obj, int baudrate)
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{
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obj->cfg.baud = baudrate;
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int retval = UART_Init(obj->uart, &obj->cfg, NULL);
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MBED_ASSERT(retval == E_NO_ERROR);
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}
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//******************************************************************************
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void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
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{
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switch (data_bits) {
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case 5:
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obj->cfg.size = UART_DATA_SIZE_5_BITS;
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break;
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case 6:
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obj->cfg.size = UART_DATA_SIZE_6_BITS;
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break;
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case 7:
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obj->cfg.size = UART_DATA_SIZE_7_BITS;
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break;
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case 8:
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obj->cfg.size = UART_DATA_SIZE_8_BITS;
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break;
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default:
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MBED_ASSERT(0);
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break;
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}
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switch (parity) {
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case ParityNone:
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obj->cfg.parity = UART_PARITY_DISABLE;
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break;
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case ParityOdd :
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obj->cfg.parity = UART_PARITY_ODD;
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break;
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case ParityEven:
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obj->cfg.parity = UART_PARITY_EVEN;
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break;
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case ParityForced1:
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case ParityForced0:
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default:
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MBED_ASSERT(0);
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break;
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}
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switch (stop_bits) {
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case 1:
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obj->cfg.extra_stop = 0;
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break;
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case 2:
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obj->cfg.extra_stop = 1;
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break;
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default:
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MBED_ASSERT(0);
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break;
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}
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int retval = UART_Init(obj->uart, &obj->cfg, NULL);
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MBED_ASSERT(retval == E_NO_ERROR);
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}
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//******************************************************************************
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void uart_handler(serial_t *obj)
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{
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if (obj && obj->id) {
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if ((obj->uart->inten & (MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS)) &&
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(obj->uart->intfl & (MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS))) {
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irq_handler(obj->id, RxIrq);
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obj->uart->intfl = (MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
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}
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if ((obj->uart->inten & MXC_F_UART_INTFL_TX_FIFO_AE) &&
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(obj->uart->intfl & MXC_F_UART_INTFL_TX_FIFO_AE)) {
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irq_handler(obj->id, TxIrq);
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obj->uart->intfl = MXC_F_UART_INTFL_TX_FIFO_AE;
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}
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}
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}
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void uart0_handler(void) { uart_handler(objs[0]); }
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void uart1_handler(void) { uart_handler(objs[1]); }
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void uart2_handler(void) { uart_handler(objs[2]); }
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void uart3_handler(void) { uart_handler(objs[3]); }
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//******************************************************************************
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void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
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{
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irq_handler = handler;
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obj->id = id;
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}
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//******************************************************************************
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void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
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{
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MBED_ASSERT(obj->index < MXC_CFG_UART_INSTANCES);
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// objs[obj->index] = obj;
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switch (obj->index) {
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case 0:
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NVIC_SetVector(UART0_IRQn, (uint32_t)uart0_handler);
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NVIC_EnableIRQ(UART0_IRQn);
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break;
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case 1:
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NVIC_SetVector(UART1_IRQn, (uint32_t)uart1_handler);
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NVIC_EnableIRQ(UART1_IRQn);
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break;
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case 2:
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NVIC_SetVector(UART2_IRQn, (uint32_t)uart2_handler);
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NVIC_EnableIRQ(UART2_IRQn);
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break;
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case 3:
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NVIC_SetVector(UART3_IRQn, (uint32_t)uart3_handler);
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NVIC_EnableIRQ(UART3_IRQn);
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break;
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default:
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MBED_ASSERT(0);
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}
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if (irq == RxIrq) {
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// Enable RX FIFO Threshold Interrupt
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if (enable) {
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// Clear pending interrupts
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obj->uart->intfl = obj->uart->intfl;
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obj->uart->inten |= (MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
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} else {
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// Clear pending interrupts
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obj->uart->intfl = obj->uart->intfl;
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obj->uart->inten &= ~(MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
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}
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} else if (irq == TxIrq) {
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// Set TX Almost Empty level to interrupt when empty
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MXC_SET_FIELD(&obj->uart->tx_fifo_ctrl,
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MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL,
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(MXC_UART_FIFO_DEPTH - 1) << MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS);
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// Enable TX Almost Empty Interrupt
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if (enable) {
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// Clear pending interrupts
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obj->uart->intfl = obj->uart->intfl;
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obj->uart->inten |= MXC_F_UART_INTFL_TX_FIFO_AE;
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} else {
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// Clear pending interrupts
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obj->uart->intfl = obj->uart->intfl;
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obj->uart->inten &= ~MXC_F_UART_INTFL_TX_FIFO_AE;
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}
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} else {
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MBED_ASSERT(0);
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}
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}
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//******************************************************************************
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int serial_getc(serial_t *obj)
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{
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int c = -1;
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if (obj->rx != NC) {
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// Wait for data to be available
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while ((obj->uart->rx_fifo_ctrl & MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY) == 0);
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c = obj->fifo->rx;
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// Clear receive interrupt sources
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obj->uart->intfl = (MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
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}
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return c;
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}
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//******************************************************************************
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void serial_putc(serial_t *obj, int c)
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{
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if (obj->tx != NC) {
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// Wait for room in the FIFO without blocking interrupts.
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while (UART_NumWriteAvail(obj->uart) == 0);
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// Must clear before every write to the buffer to know that the FIFO
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// is empty when the TX DONE bit is set
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obj->uart->intfl = MXC_F_UART_INTFL_TX_DONE;
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obj->fifo->tx = (uint8_t)c;
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}
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}
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//******************************************************************************
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int serial_readable(serial_t *obj)
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{
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return UART_NumReadAvail(obj->uart);
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}
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//******************************************************************************
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int serial_writable(serial_t *obj)
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{
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return UART_NumWriteAvail(obj->uart);
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}
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//******************************************************************************
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void serial_clear(serial_t *obj)
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{
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// Clear the RX and TX FIFOs
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UART_DrainRX(obj->uart);
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UART_DrainTX(obj->uart);
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}
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//******************************************************************************
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void serial_break_set(serial_t *obj)
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{
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// Make sure that nothing is being sent
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while (((obj->uart->tx_fifo_ctrl & MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY)
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>> MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS) > 0);
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while (!(obj->uart->intfl & MXC_F_UART_INTFL_TX_DONE));
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// Configure TX to output 0
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usurp_pin(obj->tx, 0);
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// GPIO is setup now, but we need to unmap UART from the pin
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pin_function_t *pin_func = (pin_function_t *)pinmap_find_function(obj->tx, PinMap_UART_TX);
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*pin_func->reg_req &= ~MXC_F_IOMAN_UART_REQ_IO_REQ;
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MBED_ASSERT((*pin_func->reg_ack & MXC_F_IOMAN_UART_ACK_IO_ACK) == 0);
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}
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//******************************************************************************
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void serial_break_clear(serial_t *obj)
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{
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// Configure TX to output 1
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usurp_pin(obj->tx, 1);
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// Return TX to UART control
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serial_pinout_tx(obj->tx);
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}
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//******************************************************************************
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void serial_pinout_tx(PinName tx)
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{
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pinmap_pinout(tx, PinMap_UART_TX);
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}
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//******************************************************************************
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void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
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{
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pin_function_t rtscts_pin_func = {0};
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obj->cfg.cts = 0;
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obj->cfg.rts = 0;
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if ((FlowControlCTS == type) || (FlowControlRTSCTS == type)) {
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UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
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UARTName uart = (UARTName)pinmap_merge(uart_cts, (UARTName)obj->uart);
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// Assert pin is usable with existing uart
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MBED_ASSERT(uart != (UARTName)NC);
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pin_function_t *pin_func;
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pin_func = (pin_function_t *)pinmap_find_function(txflow, PinMap_UART_CTS);
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rtscts_pin_func.req_val |= pin_func->req_val;
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obj->cfg.cts = 1;
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}
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if ((FlowControlRTS == type) || (FlowControlRTSCTS == type)) {
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UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
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UARTName uart = (UARTName)pinmap_merge(uart_rts, (UARTName)obj->uart);
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MBED_ASSERT(uart != (UARTName)NC);
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pin_function_t *pin_func;
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pin_func = (pin_function_t *)pinmap_find_function(rxflow, PinMap_UART_RTS);
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rtscts_pin_func.req_val |= pin_func->req_val;
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obj->cfg.rts = 1;
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}
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obj->sys_cfg.io_cfg.req_val.value |= rtscts_pin_func.req_val;
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int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
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MBED_ASSERT(retval == E_NO_ERROR);
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}
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//******************************************************************************
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static void usurp_pin(PinName pin, int state)
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{
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gpio_t gpio;
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gpio_init_out(&gpio, pin);
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gpio_write(&gpio, state);
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}
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const PinMap *serial_tx_pinmap()
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{
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return PinMap_UART_TX;
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}
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const PinMap *serial_rx_pinmap()
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{
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return PinMap_UART_RX;
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}
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const PinMap *serial_cts_pinmap()
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{
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return PinMap_UART_CTS;
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}
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const PinMap *serial_rts_pinmap()
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{
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return PinMap_UART_RTS;
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}
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void serial_free(serial_t *obj)
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{
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// Not implemented
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}
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