Import Mbed OS hard-float snapshot

targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_IAR/M261.icf

@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2019-2020, Nuvoton Technology Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+
+include "../M261_mem.icf.h";
+
+if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; }
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
+define symbol __ICFEDIT_region_ROM_end__   = MBED_APP_START + MBED_APP_SIZE - 1;
+define symbol __ICFEDIT_region_IRAM_start__ = MBED_RAM_APP_START;
+define symbol __ICFEDIT_region_IRAM_end__   = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 0x100 - 1;
+define symbol __region_CRASH_DATA_RAM_start__  = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 0x100;
+define symbol __region_CRASH_DATA_RAM_end__  = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
+define symbol __ICFEDIT_size_intvec__ = (4 * (16 + 102));
+define symbol __ICFEDIT_size_heap__   = 0x400;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region IRAM_region  = mem:[from __ICFEDIT_region_IRAM_start__  to __ICFEDIT_region_IRAM_end__];
+define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
+
+define block CSTACK     with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP       with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__    { };
+/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
+define block IRAMVEC   with alignment = 1024, size = __ICFEDIT_size_intvec__          { };
+
+/* Define Crash Data Symbols */
+define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
+define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place at start of IRAM_region   { block CSTACK };
+place in IRAM_region   { block IRAMVEC };
+place in IRAM_region   { readwrite };
+place in IRAM_region   { block HEAP };