Import Mbed OS hard-float snapshot
This commit is contained in:
Beslan
@@ -0,0 +1,50 @@
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if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; }
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if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; }
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
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define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
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define symbol __ICFEDIT_region_NVIC_start__ = 0x10000000;
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define symbol __ICFEDIT_region_NVIC_end__ = 0x100000C7;
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define symbol __ICFEDIT_region_RAM_start__ = 0x100000C8;
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define symbol __ICFEDIT_region_RAM_end__ = 0x10007FE0;
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/*-Sizes-*/
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if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
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define symbol MBED_BOOT_STACK_SIZE = 0x400;
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}
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define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
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define symbol __ICFEDIT_size_heap__ = 0x2000;
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/**** End of ICF editor section. ###ICF###*/
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define symbol __CRP_start__ = MBED_APP_START + 0x000002FC;
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define symbol __CRP_end__ = MBED_APP_START + 0x000002FF;
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define symbol __RAM1_start__ = 0x2007C000;
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define symbol __RAM1_end__ = 0x20083FFF;
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__] - mem:[from __CRP_start__ to __CRP_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
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define region RAM1_region = mem:[from __RAM1_start__ to __RAM1_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite,
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block HEAP, block CSTACK };
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place in CRP_region { section .CRPSection };
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place in RAM1_region { section .ethusbram };
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@@ -0,0 +1,353 @@
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;/*****************************************************************************
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; * @file: startup_LPC17xx.s
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; * @purpose: CMSIS Cortex-M3 Core Device Startup File
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; * for the NXP LPC17xx Device Series
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; * @version: V1.03
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; * @date: 09. February 2010
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; *----------------------------------------------------------------------------
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; *
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; * Copyright (C) 2010 ARM Limited. All rights reserved.
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; *
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; * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
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; * processor based microcontrollers. This file can be freely distributed
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; * within development tools that are supporting such ARM based processors.
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; *
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; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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; *
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; ******************************************************************************/
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;
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; The vector table is normally located at address 0.
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; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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; The name "__vector_table" has special meaning for C-SPY:
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; it is where the SP start value is found, and the NVIC vector
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; table register (VTOR) is initialized to this address if != 0.
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;
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; Cortex-M version
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;
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:NOROOT(2)
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EXTERN __iar_program_start
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EXTERN SystemInit
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PUBLIC __vector_table
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PUBLIC __vector_table_0x1c
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PUBLIC __Vectors
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PUBLIC __Vectors_End
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PUBLIC __Vectors_Size
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DATA
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__vector_table
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DCD sfe(CSTACK)
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DCD Reset_Handler
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DCD NMI_Handler
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DCD HardFault_Handler
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DCD MemManage_Handler
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DCD BusFault_Handler
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DCD UsageFault_Handler
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__vector_table_0x1c
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD SVC_Handler
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DCD DebugMon_Handler
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DCD 0
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DCD PendSV_Handler
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DCD SysTick_Handler
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; External Interrupts
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DCD WDT_IRQHandler ; 16: Watchdog Timer
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DCD TIMER0_IRQHandler ; 17: Timer0
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DCD TIMER1_IRQHandler ; 18: Timer1
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DCD TIMER2_IRQHandler ; 19: Timer2
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DCD TIMER3_IRQHandler ; 20: Timer3
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DCD UART0_IRQHandler ; 21: UART0
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DCD UART1_IRQHandler ; 22: UART1
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DCD UART2_IRQHandler ; 23: UART2
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DCD UART3_IRQHandler ; 24: UART3
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DCD PWM1_IRQHandler ; 25: PWM1
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DCD I2C0_IRQHandler ; 26: I2C0
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DCD I2C1_IRQHandler ; 27: I2C1
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DCD I2C2_IRQHandler ; 28: I2C2
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DCD SPI_IRQHandler ; 29: SPI
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DCD SSP0_IRQHandler ; 30: SSP0
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DCD SSP1_IRQHandler ; 31: SSP1
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DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
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DCD RTC_IRQHandler ; 33: Real Time Clock
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DCD EINT0_IRQHandler ; 34: External Interrupt 0
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DCD EINT1_IRQHandler ; 35: External Interrupt 1
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DCD EINT2_IRQHandler ; 36: External Interrupt 2
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DCD EINT3_IRQHandler ; 37: External Interrupt 3
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DCD ADC_IRQHandler ; 38: A/D Converter
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DCD BOD_IRQHandler ; 39: Brown-Out Detect
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DCD USB_IRQHandler ; 40: USB
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DCD CAN_IRQHandler ; 41: CAN
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DCD DMA_IRQHandler ; 42: General Purpose DMA
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DCD I2S_IRQHandler ; 43: I2S
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DCD ENET_IRQHandler ; 44: Ethernet
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DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer
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DCD MCPWM_IRQHandler ; 46: Motor Control PWM
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DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
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DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
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DCD USBActivity_IRQHandler ; 49: USB Activity Interrupt
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DCD CANActivity_IRQHandler ; 50: CAN Activity Interrupt
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__Vectors_End
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__Vectors EQU __vector_table
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__Vectors_Size EQU __Vectors_End - __Vectors
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Default interrupt handlers.
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;;
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THUMB
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PUBWEAK Reset_Handler
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SECTION .text:CODE:REORDER(2)
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Reset_Handler
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__iar_program_start
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BX R0
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PUBWEAK NMI_Handler
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SECTION .text:CODE:REORDER(1)
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NMI_Handler
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B NMI_Handler
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PUBWEAK HardFault_Handler
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SECTION .text:CODE:REORDER(1)
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HardFault_Handler
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B HardFault_Handler
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PUBWEAK MemManage_Handler
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SECTION .text:CODE:REORDER(1)
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MemManage_Handler
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B MemManage_Handler
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PUBWEAK BusFault_Handler
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SECTION .text:CODE:REORDER(1)
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BusFault_Handler
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B BusFault_Handler
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PUBWEAK UsageFault_Handler
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SECTION .text:CODE:REORDER(1)
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UsageFault_Handler
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B UsageFault_Handler
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PUBWEAK SVC_Handler
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SECTION .text:CODE:REORDER(1)
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SVC_Handler
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B SVC_Handler
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PUBWEAK DebugMon_Handler
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SECTION .text:CODE:REORDER(1)
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DebugMon_Handler
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B DebugMon_Handler
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PUBWEAK PendSV_Handler
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SECTION .text:CODE:REORDER(1)
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PendSV_Handler
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B PendSV_Handler
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PUBWEAK SysTick_Handler
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SECTION .text:CODE:REORDER(1)
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SysTick_Handler
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B SysTick_Handler
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PUBWEAK WDT_IRQHandler
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SECTION .text:CODE:REORDER(1)
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WDT_IRQHandler
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B WDT_IRQHandler
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PUBWEAK TIMER0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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TIMER0_IRQHandler
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B TIMER0_IRQHandler
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PUBWEAK TIMER1_IRQHandler
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SECTION .text:CODE:REORDER(1)
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TIMER1_IRQHandler
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B TIMER1_IRQHandler
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PUBWEAK TIMER2_IRQHandler
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SECTION .text:CODE:REORDER(1)
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TIMER2_IRQHandler
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B TIMER2_IRQHandler
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PUBWEAK TIMER3_IRQHandler
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SECTION .text:CODE:REORDER(1)
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TIMER3_IRQHandler
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B TIMER3_IRQHandler
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PUBWEAK UART0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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UART0_IRQHandler
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B UART0_IRQHandler
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PUBWEAK UART1_IRQHandler
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SECTION .text:CODE:REORDER(1)
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UART1_IRQHandler
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B UART1_IRQHandler
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PUBWEAK UART2_IRQHandler
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SECTION .text:CODE:REORDER(1)
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UART2_IRQHandler
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B UART2_IRQHandler
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PUBWEAK UART3_IRQHandler
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SECTION .text:CODE:REORDER(1)
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UART3_IRQHandler
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B UART3_IRQHandler
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PUBWEAK PWM1_IRQHandler
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SECTION .text:CODE:REORDER(1)
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PWM1_IRQHandler
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B PWM1_IRQHandler
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PUBWEAK I2C0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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I2C0_IRQHandler
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B I2C0_IRQHandler
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PUBWEAK I2C1_IRQHandler
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SECTION .text:CODE:REORDER(1)
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I2C1_IRQHandler
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B I2C1_IRQHandler
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PUBWEAK I2C2_IRQHandler
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SECTION .text:CODE:REORDER(1)
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I2C2_IRQHandler
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B I2C2_IRQHandler
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PUBWEAK SPI_IRQHandler
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SECTION .text:CODE:REORDER(1)
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SPI_IRQHandler
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B SPI_IRQHandler
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PUBWEAK SSP0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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SSP0_IRQHandler
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B SSP0_IRQHandler
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PUBWEAK SSP1_IRQHandler
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SECTION .text:CODE:REORDER(1)
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SSP1_IRQHandler
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B SSP1_IRQHandler
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PUBWEAK PLL0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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PLL0_IRQHandler
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B PLL0_IRQHandler
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PUBWEAK RTC_IRQHandler
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SECTION .text:CODE:REORDER(1)
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RTC_IRQHandler
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B RTC_IRQHandler
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PUBWEAK EINT0_IRQHandler
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SECTION .text:CODE:REORDER(1)
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EINT0_IRQHandler
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B EINT0_IRQHandler
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PUBWEAK EINT1_IRQHandler
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SECTION .text:CODE:REORDER(1)
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EINT1_IRQHandler
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B EINT1_IRQHandler
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PUBWEAK EINT2_IRQHandler
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SECTION .text:CODE:REORDER(1)
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EINT2_IRQHandler
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B EINT2_IRQHandler
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PUBWEAK EINT3_IRQHandler
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SECTION .text:CODE:REORDER(1)
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EINT3_IRQHandler
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B EINT3_IRQHandler
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PUBWEAK ADC_IRQHandler
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SECTION .text:CODE:REORDER(1)
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ADC_IRQHandler
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B ADC_IRQHandler
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PUBWEAK BOD_IRQHandler
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SECTION .text:CODE:REORDER(1)
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BOD_IRQHandler
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B BOD_IRQHandler
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PUBWEAK USB_IRQHandler
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SECTION .text:CODE:REORDER(1)
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USB_IRQHandler
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B USB_IRQHandler
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PUBWEAK CAN_IRQHandler
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SECTION .text:CODE:REORDER(1)
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CAN_IRQHandler
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B CAN_IRQHandler
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PUBWEAK DMA_IRQHandler
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SECTION .text:CODE:REORDER(1)
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DMA_IRQHandler
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B DMA_IRQHandler
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PUBWEAK I2S_IRQHandler
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SECTION .text:CODE:REORDER(1)
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I2S_IRQHandler
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B I2S_IRQHandler
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PUBWEAK ENET_IRQHandler
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SECTION .text:CODE:REORDER(1)
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ENET_IRQHandler
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B ENET_IRQHandler
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PUBWEAK RIT_IRQHandler
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SECTION .text:CODE:REORDER(1)
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RIT_IRQHandler
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B RIT_IRQHandler
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PUBWEAK MCPWM_IRQHandler
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SECTION .text:CODE:REORDER(1)
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MCPWM_IRQHandler
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B MCPWM_IRQHandler
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PUBWEAK QEI_IRQHandler
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SECTION .text:CODE:REORDER(1)
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QEI_IRQHandler
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B QEI_IRQHandler
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PUBWEAK PLL1_IRQHandler
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SECTION .text:CODE:REORDER(1)
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PLL1_IRQHandler
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B PLL1_IRQHandler
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PUBWEAK USBActivity_IRQHandler
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SECTION .text:CODE:REORDER(1)
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USBActivity_IRQHandler
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B USBActivity_IRQHandler
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PUBWEAK CANActivity_IRQHandler
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SECTION .text:CODE:REORDER(1)
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CANActivity_IRQHandler
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B CANActivity_IRQHandler
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END
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Reference in New Issue
Block a user