Import Mbed OS hard-float snapshot
This commit is contained in:
560
targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_gpio.c
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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_gpio.c
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/**
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******************************************************************************
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* @file stm32l1xx_hal_gpio.c
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* @author MCD Application Team
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* @brief GPIO HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the General Purpose Input/Output (GPIO) peripheral:
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* + Initialization and de-initialization functions
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* + IO operation functions
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*
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@verbatim
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==============================================================================
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##### GPIO Peripheral features #####
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==============================================================================
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[..]
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Each port bit of the general-purpose I/O (GPIO) ports can be individually
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configured by software in several modes:
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(+) Input mode
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(+) Analog mode
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(+) Output mode
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(+) Alternate function mode
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(+) External interrupt/event lines
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[..]
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During and just after reset, the alternate functions and external interrupt
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lines are not active and the I/O ports are configured in input floating mode.
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[..]
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All GPIO pins have weak internal pull-up and pull-down resistors, which can be
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activated or not.
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[..]
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In Output or Alternate mode, each IO can be configured on open-drain or push-pull
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type and the IO speed can be selected depending on the VDD value.
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[..]
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The microcontroller IO pins are connected to onboard peripherals/modules through a
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multiplexer that allows only one peripheral s alternate function (AF) connected
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to an IO pin at a time. In this way, there can be no conflict between peripherals
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sharing the same IO pin.
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[..]
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All ports have external interrupt/event capability. To use external interrupt
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lines, the port must be configured in input mode. All available GPIO pins are
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connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
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[..]
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The external interrupt/event controller consists of up to 28 edge detectors
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(depending on products 16 lines are connected to GPIO) for generating event/interrupt
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requests (each input line can be independently configured to select the type
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(interrupt or event) and the corresponding trigger event (rising or falling or both).
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Each line can also be masked independently.
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##### How to use this driver #####
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==============================================================================
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[..]
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(#) Enable the GPIO AHB clock using the following function : __GPIOx_CLK_ENABLE().
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(#) Configure the GPIO pin(s) using HAL_GPIO_Init().
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(++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
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(++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
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structure.
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(++) In case of Output or alternate function mode selection: the speed is
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configured through "Speed" member from GPIO_InitTypeDef structure,
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the speed is configurable: Low, Medium and High.
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(++) If alternate mode is selected, the alternate function connected to the IO
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is configured through "Alternate" member from GPIO_InitTypeDef structure
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(++) Analog mode is required when a pin is to be used as ADC channel
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or DAC output.
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(++) In case of external interrupt/event selection the "Mode" member from
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GPIO_InitTypeDef structure select the type (interrupt or event) and
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the corresponding trigger event (rising or falling or both).
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(#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
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mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
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HAL_NVIC_EnableIRQ().
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(#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also
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recommended to use it to unconfigure pin which was used as an external interrupt
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or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG
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registers.
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(#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
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(#) To set/reset the level of a pin configured in output mode use
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HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
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(#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
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(#) During and just after reset, the alternate functions are not
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active and the GPIO pins are configured in input floating mode (except JTAG
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pins).
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(#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
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(PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
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priority over the GPIO function.
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(#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
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general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
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The HSE has priority over the GPIO function.
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l1xx_hal.h"
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/** @addtogroup STM32L1xx_HAL_Driver
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* @{
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*/
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/** @addtogroup GPIO
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* @brief GPIO HAL module driver
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* @{
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*/
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#ifdef HAL_GPIO_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @addtogroup GPIO_Private_Constants
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* @{
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*/
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#define GPIO_MODE (0x00000003U)
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#define EXTI_MODE (0x10000000U)
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#define GPIO_MODE_IT (0x00010000U)
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#define GPIO_MODE_EVT (0x00020000U)
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#define RISING_EDGE (0x00100000U)
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#define FALLING_EDGE (0x00200000U)
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#define GPIO_OUTPUT_TYPE (0x00000010U)
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#define GPIO_NUMBER (16U)
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/**
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* @}
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*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions ---------------------------------------------------------*/
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/** @addtogroup GPIO_Exported_Functions
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* @{
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*/
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/** @addtogroup GPIO_Exported_Functions_Group1
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* @brief Initialization and Configuration functions
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*
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@verbatim
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===============================================================================
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##### Initialization and Configuration functions #####
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===============================================================================
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@endverbatim
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* @{
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*/
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/**
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* @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
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* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
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* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
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* the configuration information for the specified GPIO peripheral.
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* @retval None
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*/
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void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
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{
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uint32_t position = 0x00;
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uint32_t iocurrent = 0x00;
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uint32_t temp = 0x00;
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/* Check the parameters */
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assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
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assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
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assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
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assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
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/* Configure the port pins */
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while (((GPIO_Init->Pin) >> position) != 0)
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{
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/* Get current io position */
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iocurrent = (GPIO_Init->Pin) & (1U << position);
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if(iocurrent)
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{
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/*--------------------- GPIO Mode Configuration ------------------------*/
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/* In case of Alternate function mode selection */
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if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
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{
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/* Check the Alternate function parameters */
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assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
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assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
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/* Configure Alternate function mapped with the current IO */
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/* Identify AFRL or AFRH register based on IO position*/
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temp = GPIOx->AFR[position >> 3];
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CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4)) ;
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SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4));
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GPIOx->AFR[position >> 3] = temp;
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}
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/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
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temp = GPIOx->MODER;
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CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2));
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SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2));
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GPIOx->MODER = temp;
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/* In case of Output or Alternate function mode selection */
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if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
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(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
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{
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/* Check the Speed parameter */
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assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
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/* Configure the IO Speed */
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temp = GPIOx->OSPEEDR;
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CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
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SET_BIT(temp, GPIO_Init->Speed << (position * 2));
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GPIOx->OSPEEDR = temp;
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/* Configure the IO Output Type */
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temp = GPIOx->OTYPER;
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CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ;
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SET_BIT(temp, ((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
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GPIOx->OTYPER = temp;
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}
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/* Activate the Pull-up or Pull down resistor for the current IO */
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temp = GPIOx->PUPDR;
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CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2));
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SET_BIT(temp, (GPIO_Init->Pull) << (position * 2));
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GPIOx->PUPDR = temp;
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/*--------------------- EXTI Mode Configuration ------------------------*/
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/* Configure the External Interrupt or event for the current IO */
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if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
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{
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/* Enable SYSCFG Clock */
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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temp = SYSCFG->EXTICR[position >> 2];
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CLEAR_BIT(temp, (0x0FU) << (4 * (position & 0x03)));
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SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
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SYSCFG->EXTICR[position >> 2] = temp;
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/* Clear EXTI line configuration */
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temp = EXTI->IMR;
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CLEAR_BIT(temp, (uint32_t)iocurrent);
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if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
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{
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SET_BIT(temp, iocurrent);
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}
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EXTI->IMR = temp;
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temp = EXTI->EMR;
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CLEAR_BIT(temp, (uint32_t)iocurrent);
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if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
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{
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SET_BIT(temp, iocurrent);
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}
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EXTI->EMR = temp;
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/* Clear Rising Falling edge configuration */
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temp = EXTI->RTSR;
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CLEAR_BIT(temp, (uint32_t)iocurrent);
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if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
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{
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SET_BIT(temp, iocurrent);
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}
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EXTI->RTSR = temp;
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temp = EXTI->FTSR;
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CLEAR_BIT(temp, (uint32_t)iocurrent);
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if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
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{
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SET_BIT(temp, iocurrent);
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}
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EXTI->FTSR = temp;
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}
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}
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position++;
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}
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}
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/**
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* @brief De-initializes the GPIOx peripheral registers to their default reset values.
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* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
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* @param GPIO_Pin: specifies the port bit to be written.
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* This parameter can be one of GPIO_PIN_x where x can be (0..15).
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* @retval None
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*/
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void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
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{
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uint32_t position = 0x00;
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uint32_t iocurrent = 0x00;
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uint32_t tmp = 0x00;
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/* Check the parameters */
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assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
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assert_param(IS_GPIO_PIN(GPIO_Pin));
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/* Configure the port pins */
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while ((GPIO_Pin >> position) != 0)
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{
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/* Get current io position */
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iocurrent = (GPIO_Pin) & (1U << position);
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if (iocurrent)
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{
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/*------------------------- GPIO Mode Configuration --------------------*/
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/* Configure IO Direction in Input Floting Mode */
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CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2));
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/* Configure the default Alternate Function in current IO */
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CLEAR_BIT(GPIOx->AFR[position >> 3], 0xFU << ((uint32_t)(position & 0x07U) * 4)) ;
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/* Configure the default value for IO Speed */
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CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
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/* Configure the default value IO Output Type */
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CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ;
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/* Deactivate the Pull-up oand Pull-down resistor for the current IO */
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CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2));
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/*------------------------- EXTI Mode Configuration --------------------*/
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/* Clear the External Interrupt or Event for the current IO */
|
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tmp = SYSCFG->EXTICR[position >> 2];
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tmp &= ((0x0FU) << (4 * (position & 0x03)));
|
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if(tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03))))
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{
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tmp = (0x0FU) << (4 * (position & 0x03));
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CLEAR_BIT(SYSCFG->EXTICR[position >> 2], tmp);
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/* Clear EXTI line configuration */
|
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CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
|
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CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
|
||||
|
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/* Clear Rising Falling edge configuration */
|
||||
CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
|
||||
CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
|
||||
}
|
||||
}
|
||||
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||||
position++;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup GPIO_Exported_Functions_Group2
|
||||
* @brief GPIO Read, Write, Toggle, Lock and EXTI management functions.
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### IO operation functions #####
|
||||
===============================================================================
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Reads the specified input port pin.
|
||||
* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
|
||||
* @param GPIO_Pin: specifies the port bit to read.
|
||||
* This parameter can be GPIO_PIN_x where x can be (0..15).
|
||||
* @retval The input port pin value.
|
||||
*/
|
||||
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
GPIO_PinState bitstatus;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
|
||||
{
|
||||
bitstatus = GPIO_PIN_SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = GPIO_PIN_RESET;
|
||||
}
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets or clears the selected data port bit.
|
||||
* @note This function uses GPIOx_BSRR register to allow atomic read/modify
|
||||
* accesses. In this way, there is no risk of an IRQ occurring between
|
||||
* the read and the modify access.
|
||||
* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
|
||||
* @param GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be one of GPIO_PIN_x where x can be (0..15).
|
||||
* @param PinState: specifies the value to be written to the selected bit.
|
||||
* This parameter can be one of the GPIO_PinState enum values:
|
||||
* @arg GPIO_PIN_RESET: to clear the port pin
|
||||
* @arg GPIO_PIN_SET: to set the port pin
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
||||
|
||||
if (PinState != GPIO_PIN_RESET)
|
||||
{
|
||||
GPIOx->BSRR = (uint32_t)GPIO_Pin;
|
||||
}
|
||||
else
|
||||
{
|
||||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Toggles the specified GPIO pin
|
||||
* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
|
||||
* @param GPIO_Pin: specifies the pins to be toggled.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
GPIOx->ODR ^= GPIO_Pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Locks GPIO Pins configuration registers.
|
||||
* @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
|
||||
* GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
|
||||
* @note The configuration of the locked GPIO pins can no longer be modified
|
||||
* until the next reset.
|
||||
* @note Limitation concerning GPIOx_OTYPER: Locking of GPIOx_OTYPER[i] with i = 15..8
|
||||
* depends from setting of GPIOx_LCKR[i-8] and not from GPIOx_LCKR[i].
|
||||
* GPIOx_LCKR[i-8] is locking GPIOx_OTYPER[i] together with GPIOx_OTYPER[i-8].
|
||||
* It is not possible to lock GPIOx_OTYPER[i] with i = 15..8, without locking also
|
||||
* GPIOx_OTYPER[i-8].
|
||||
* Workaround: When calling HAL_GPIO_LockPin with GPIO_Pin from GPIO_PIN_8 to GPIO_PIN_15,
|
||||
* you must call also HAL_GPIO_LockPin with GPIO_Pin - 8.
|
||||
* (When locking a pin from GPIO_PIN_8 to GPIO_PIN_15, you must lock also the corresponding
|
||||
* GPIO_PIN_0 to GPIO_PIN_7).
|
||||
* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
|
||||
* @param GPIO_Pin: Specifies the port bit to be locked.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
__IO uint32_t tmp = GPIO_LCKR_LCKK;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
/* Apply lock key write sequence */
|
||||
SET_BIT(tmp, GPIO_Pin);
|
||||
/* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
|
||||
GPIOx->LCKR = tmp;
|
||||
/* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
|
||||
GPIOx->LCKR = GPIO_Pin;
|
||||
/* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
|
||||
GPIOx->LCKR = tmp;
|
||||
/* Read LCKK bit*/
|
||||
tmp = GPIOx->LCKR;
|
||||
|
||||
if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
|
||||
{
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles EXTI interrupt request.
|
||||
* @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
|
||||
{
|
||||
/* EXTI line interrupt detected */
|
||||
if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
|
||||
{
|
||||
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
|
||||
HAL_GPIO_EXTI_Callback(GPIO_Pin);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief EXTI line detection callbacks.
|
||||
* @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(GPIO_Pin);
|
||||
|
||||
/* NOTE : This function Should not be modified, when the callback is needed,
|
||||
the HAL_GPIO_EXTI_Callback could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
Reference in New Issue
Block a user