Import Mbed OS hard-float snapshot
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/****************************************************************************
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*
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* Copyright 2020 Samsung Electronics All Rights Reserved.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing,
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* software distributed under the License is distributed on an
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* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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* either express or implied. See the License for the specific
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* language governing permissions and limitations under the License.
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*
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****************************************************************************/
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#include "cmsis.h"
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/*----------------------------------------------------------------------------
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Define clocks
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*----------------------------------------------------------------------------*/
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#define PERI_CLOCK (4096000UL)
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/*----------------------------------------------------------------------------
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System Core Clock Variable
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*----------------------------------------------------------------------------*/
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uint32_t SystemCoreClock = HSOSC_CLK_FREQ ;//LSOSC_CLK_FREQ; /* System Clock Frequency (Core Clock)*/
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uint32_t PeriPheralClock = PERI_CLOCK;
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/*----------------------------------------------------------------------------
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Clock functions
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*----------------------------------------------------------------------------*/
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static void peripheral_init(void)
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{
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/*AFE Voltage Config */
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putreg32(&BP_AFE_TOP->REF_CTRL, 0x7A68201F);
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putreg32(&BP_AFE_TOP->AFE_CLK_CTRL, 0x0);
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}
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void SystemCoreClockUpdate(void) /* Get Core Clock Frequency */
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{
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SystemCoreClock = bp6a_cmu_get_clock_freq(CMU_FCLK_AHBCLK);
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}
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static void pin_disable(void)
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{
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int i;
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for (i = 2; i < 14; i++) {
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putreg32(&BP_SYSCON->IOCFG[i], 0);
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}
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}
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void SystemInit(void)
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{
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/* Set floating point coprosessor access mode. */
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#if (__FPU_USED == 1)
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SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2));
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#endif
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#ifdef UNALIGNED_SUPPORT_DISABLE
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SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
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#endif
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/* USAGE/BUS/MEM FAULT ENABLE chenzhao */
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SCB->SHCSR |= (1 << 18) | (1 << 17) | (1 << 16);
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bp6a_pum_init();
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bp6a_cmu_init(CMU_SRC_CLK_HSOSC, CMU_SRC_CLK_LSOSC);
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bp6a_watchdog_enable(false);
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SystemCoreClock = bp6a_cmu_get_clock_freq(CMU_FCLK_AHBCLK);
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peripheral_init();
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pin_disable();
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}
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