Import Mbed OS hard-float snapshot
This commit is contained in:
Beslan
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/***************************************************************************//**
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* @file main.cpp
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2016 Silicon Labs, http://www.silabs.com</b>
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*******************************************************************************
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************/
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#include "mbed.h"
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#include "greentea-client/test_env.h"
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#include "unity/unity.h"
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#include "utest/utest.h"
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#include "em_cmu.h"
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#include "em_gpio.h"
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#include "em_prs.h"
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#include "em_timer.h"
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#define SHORT_TRANSFER_FRAMES 16
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#define LONG_TRANSFER_FRAMES 1842
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#if defined(TARGET_EFM32GG_STK3700) || defined(TARGET_EFM32LG_STK3600) || defined(TARGET_EFM32WG_STK3800)
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#define TEST 1
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#define TEST_UART USART1
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#define MOSI_PIN PD0
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#define MISO_PIN PD1
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#define CLK_PIN PD2
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#define CS_PIN PD3
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#define GPIO_PORT gpioPortD
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#define GPIO_PIN_TX 0
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#define GPIO_PIN_CLK 2
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#define GPIO_PRS_SRC_TX PRS_CH_CTRL_SOURCESEL_GPIOL
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#define GPIO_PRS_SIG_TX PRS_CH_CTRL_SIGSEL_GPIOPIN0
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#define GPIO_PRS_SRC_CLK PRS_CH_CTRL_SOURCESEL_GPIOL
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#define GPIO_PRS_SIG_CLK PRS_CH_CTRL_SIGSEL_GPIOPIN2
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#define TEST_TIMER TIMER1
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#define TEST_TIMER_CLOCK cmuClock_TIMER1
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#elif defined(TARGET_EFM32PG_STK3401)
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#define TEST 1
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#define TEST_UART USART1
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#define MOSI_PIN PC6
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#define MISO_PIN PC7
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#define CLK_PIN PC8
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#define CS_PIN PC9
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#define GPIO_PORT gpioPortC
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#define GPIO_PIN_TX 6
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#define GPIO_PIN_CLK 8
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#define GPIO_PRS_SRC_TX PRS_CH_CTRL_SOURCESEL_GPIOL
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#define GPIO_PRS_SIG_TX PRS_CH_CTRL_SIGSEL_GPIOPIN6
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#define GPIO_PRS_SRC_CLK PRS_CH_CTRL_SOURCESEL_GPIOH
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#define GPIO_PRS_SIG_CLK PRS_CH_CTRL_SIGSEL_GPIOPIN8
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#define TEST_TIMER TIMER1
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#define TEST_TIMER_CLOCK cmuClock_TIMER1
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#else
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#define TEST 0
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#warning "Test config not defined; skipping test"
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#endif
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using namespace utest::v1;
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#if TEST
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DigitalOut cs(CS_PIN);
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static volatile bool complete;
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event_callback_t cb;
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static uint8_t short_data_8[SHORT_TRANSFER_FRAMES];
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static uint16_t short_data_16[SHORT_TRANSFER_FRAMES];
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static uint32_t short_data_32[SHORT_TRANSFER_FRAMES];
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static uint8_t short_data_8_rx[SHORT_TRANSFER_FRAMES];
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static uint16_t short_data_16_rx[SHORT_TRANSFER_FRAMES];
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static uint32_t short_data_32_rx[SHORT_TRANSFER_FRAMES];
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static uint8_t long_data_8[LONG_TRANSFER_FRAMES];
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static uint16_t long_data_16[LONG_TRANSFER_FRAMES];
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static uint8_t long_data_8_rx[LONG_TRANSFER_FRAMES];
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static uint16_t long_data_16_rx[LONG_TRANSFER_FRAMES];
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void callbackFunction(int flags) {
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complete = true;
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}
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void init_timer() {
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CMU_ClockEnable(cmuClock_PRS, true);
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CMU_ClockEnable(cmuClock_GPIO, true);
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CMU_ClockEnable(TEST_TIMER_CLOCK, true);
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// Setup USART TX pin as PRS producer
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GPIO_IntConfig(GPIO_PORT, GPIO_PIN_TX, false, false, false);
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PRS_SourceSignalSet(0,
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GPIO_PRS_SRC_TX,
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GPIO_PRS_SIG_TX,
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prsEdgeOff);
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// Setup USART CLK pin as PRS producer
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GPIO_IntConfig(GPIO_PORT, GPIO_PIN_CLK, false, false, false);
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PRS_SourceSignalSet(1,
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GPIO_PRS_SRC_CLK,
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GPIO_PRS_SIG_CLK,
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prsEdgeOff);
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// Setup timer to count on PRS pulses
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TIMER_Init_TypeDef timInit = TIMER_INIT_DEFAULT;
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timInit.enable = false;
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timInit.clkSel = timerClkSelCC1;
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TIMER_InitCC_TypeDef timInitCC = TIMER_INITCC_DEFAULT;
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timInitCC.prsInput = true;
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timInitCC.prsSel = timerPRSSELCh1;
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TIMER_Init(TEST_TIMER, &timInit);
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TIMER_InitCC(TEST_TIMER, 1, &timInitCC);
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TIMER_Enable(TEST_TIMER, true);
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}
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template<typename T>
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void init_arrays(T * tx, T * rx, int len, uint32_t mask) {
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for (uint32_t i = 0; i < len; i++) {
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if (tx) {
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tx[i] = i & mask;
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}
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if (rx) {
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rx[i] = 0;
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}
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}
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}
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template<typename T>
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void test_transfer(int bits, int polarity, int freq, DMAUsage dma, T * data_tx, T * data_rx, int len) {
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SPI spi(MOSI_PIN, MISO_PIN, CLK_PIN);
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spi.format(bits, polarity);
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spi.frequency(freq);
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spi.set_dma_usage(dma);
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// Clear RX buffer, setup tx pattern
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init_arrays(data_tx, data_rx, len, (1 << bits) - 1);
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// Set up PRS loopback of TX data to RX
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TEST_UART->INPUT = USART_INPUT_RXPRS | USART_INPUT_RXPRSSEL_PRSCH0;
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complete = false;
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TIMER1->CNT = 0;
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cs = 0;
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spi.transfer(data_tx, len, data_rx, data_rx ? len : 0, cb);
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while (!complete);
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uint32_t xferred = TIMER1->CNT;
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cs = 1;
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// Check that all bits were sent
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TEST_ASSERT_EQUAL(bits*len, xferred);
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// Check that all data was received correctly
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if (data_rx) {
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for (int i = 0; i < len; i++) {
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TEST_ASSERT_EQUAL(data_tx[i], data_rx[i]);
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}
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}
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}
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////////////////////////////////
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// Short single transfers
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void test_5bit_8bit_0_1mhz_short_transfer() {
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test_transfer(5, 0, 1000000, DMA_USAGE_NEVER, short_data_8, short_data_8_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_5bit_8bit_0_1mhz_short_dma_transfer() {
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test_transfer(5, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_8, short_data_8_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_5bit_16bit_0_1mhz_short_transfer() {
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test_transfer(5, 0, 1000000, DMA_USAGE_NEVER, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_5bit_16bit_0_1mhz_short_dma_transfer() {
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test_transfer(5, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_8bit_8bit_0_1mhz_short_transfer() {
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test_transfer(8, 0, 1000000, DMA_USAGE_NEVER, short_data_8, short_data_8_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_8bit_8bit_0_1mhz_short_dma_transfer() {
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test_transfer(8, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_8, short_data_8_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_8bit_16bit_0_1mhz_short_transfer() {
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test_transfer(8, 0, 1000000, DMA_USAGE_NEVER, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_8bit_16bit_0_1mhz_short_dma_transfer() {
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test_transfer(8, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
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}
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////////////////////////////////
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// Short extended/double transfers
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void test_9bit_16bit_0_1mhz_short_transfer() {
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test_transfer(9, 0, 1000000, DMA_USAGE_NEVER, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_9bit_16bit_0_1mhz_short_dma_transfer() {
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test_transfer(9, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_9bit_32bit_0_1mhz_short_transfer() {
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test_transfer(9, 0, 1000000, DMA_USAGE_NEVER, short_data_32, short_data_32_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_9bit_32bit_0_1mhz_short_dma_transfer() {
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test_transfer(9, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_32, short_data_32_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_16bit_16bit_0_1mhz_short_transfer() {
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test_transfer(16, 0, 1000000, DMA_USAGE_NEVER, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_16bit_16bit_0_1mhz_short_dma_transfer() {
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test_transfer(16, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_16, short_data_16_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_16bit_32bit_0_1mhz_short_transfer() {
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test_transfer(16, 0, 1000000, DMA_USAGE_NEVER, short_data_32, short_data_32_rx, SHORT_TRANSFER_FRAMES);
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}
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void test_16bit_32bit_0_1mhz_short_dma_transfer() {
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test_transfer(16, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, short_data_32, short_data_32_rx, SHORT_TRANSFER_FRAMES);
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}
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////////////////////////////////
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// Long single transfers
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void test_5bit_8bit_0_1mhz_long_transfer() {
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test_transfer(5, 0, 1000000, DMA_USAGE_NEVER, long_data_8, long_data_8_rx, LONG_TRANSFER_FRAMES);
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}
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void test_5bit_8bit_0_1mhz_long_dma_transfer() {
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test_transfer(5, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_8, long_data_8_rx, LONG_TRANSFER_FRAMES);
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}
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void test_5bit_16bit_0_1mhz_long_transfer() {
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test_transfer(5, 0, 1000000, DMA_USAGE_NEVER, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
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}
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void test_5bit_16bit_0_1mhz_long_dma_transfer() {
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test_transfer(5, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
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}
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void test_8bit_8bit_0_1mhz_long_transfer() {
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test_transfer(8, 0, 1000000, DMA_USAGE_NEVER, long_data_8, long_data_8_rx, LONG_TRANSFER_FRAMES);
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}
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void test_8bit_8bit_0_1mhz_long_dma_transfer() {
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test_transfer(8, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_8, long_data_8_rx, LONG_TRANSFER_FRAMES);
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}
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void test_8bit_16bit_0_1mhz_long_transfer() {
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test_transfer(8, 0, 1000000, DMA_USAGE_NEVER, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
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}
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void test_8bit_16bit_0_1mhz_long_dma_transfer() {
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test_transfer(8, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
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}
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////////////////////////////////
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// Long extended/double transfers
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void test_9bit_16bit_0_1mhz_long_transfer() {
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test_transfer(9, 0, 1000000, DMA_USAGE_NEVER, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
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}
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void test_9bit_16bit_0_1mhz_long_dma_transfer() {
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test_transfer(9, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
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}
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void test_16bit_16bit_0_1mhz_long_transfer() {
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test_transfer(16, 0, 1000000, DMA_USAGE_NEVER, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
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}
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void test_16bit_16bit_0_1mhz_long_dma_transfer() {
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test_transfer(16, 0, 1000000, DMA_USAGE_OPPORTUNISTIC, long_data_16, long_data_16_rx, LONG_TRANSFER_FRAMES);
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}
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////////////////////////////////
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#else
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void test_dummy() {
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TEST_IGNORE_MESSAGE("This test is not compatible with this target.");
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}
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#endif
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utest::v1::status_t greentea_failure_handler(const Case *const source, const failure_t reason) {
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greentea_case_failure_abort_handler(source, reason);
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return STATUS_CONTINUE;
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}
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Case cases[] = {
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#if TEST
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Case("5-bit frames with 8-bit data, 1 MHz (short)", test_5bit_8bit_0_1mhz_short_transfer, greentea_failure_handler),
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Case("5-bit frames with 8-bit data, 1 MHz, DMA (short)", test_5bit_8bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
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Case("5-bit frames with 16-bit data, 1 MHz (short)", test_5bit_16bit_0_1mhz_short_transfer, greentea_failure_handler),
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Case("5-bit frames with 16-bit data, 1 MHz, DMA (short)", test_5bit_16bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
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Case("8-bit frames with 8-bit data, 1 MHz (short)", test_8bit_8bit_0_1mhz_short_transfer, greentea_failure_handler),
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Case("8-bit frames with 8-bit data, 1 MHz, DMA (short)", test_8bit_8bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
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Case("8-bit frames with 16-bit data, 1 MHz (short)", test_8bit_16bit_0_1mhz_short_transfer, greentea_failure_handler),
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Case("8-bit frames with 16-bit data, 1 MHz, DMA (short)", test_8bit_16bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
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Case("9-bit frames with 16-bit data, 1 MHz (short)", test_9bit_16bit_0_1mhz_short_transfer, greentea_failure_handler),
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Case("9-bit frames with 16-bit data, 1 MHz, DMA (short)", test_9bit_16bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
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Case("9-bit frames with 32-bit data, 1 MHz (short)", test_9bit_32bit_0_1mhz_short_transfer, greentea_failure_handler),
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Case("9-bit frames with 32-bit data, 1 MHz, DMA (short)", test_9bit_32bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
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Case("16-bit frames with 16-bit data, 1 MHz (short)", test_16bit_16bit_0_1mhz_short_transfer, greentea_failure_handler),
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Case("16-bit frames with 16-bit data, 1 MHz, DMA (short)", test_16bit_16bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
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Case("16-bit frames with 32-bit data, 1 MHz (short)", test_16bit_32bit_0_1mhz_short_transfer, greentea_failure_handler),
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Case("16-bit frames with 32-bit data, 1 MHz, DMA (short)", test_16bit_32bit_0_1mhz_short_dma_transfer, greentea_failure_handler),
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Case("5-bit frames with 8-bit data, 1 MHz (long)", test_5bit_8bit_0_1mhz_long_transfer, greentea_failure_handler),
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Case("5-bit frames with 8-bit data, 1 MHz, DMA (long)", test_5bit_8bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
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Case("5-bit frames with 16-bit data, 1 MHz (long)", test_5bit_16bit_0_1mhz_long_transfer, greentea_failure_handler),
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Case("5-bit frames with 16-bit data, 1 MHz, DMA (long)", test_5bit_16bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
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Case("8-bit frames with 8-bit data, 1 MHz (long)", test_8bit_8bit_0_1mhz_long_transfer, greentea_failure_handler),
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Case("8-bit frames with 8-bit data, 1 MHz, DMA (long)", test_8bit_8bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
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Case("8-bit frames with 16-bit data, 1 MHz (long)", test_8bit_16bit_0_1mhz_long_transfer, greentea_failure_handler),
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Case("8-bit frames with 16-bit data, 1 MHz, DMA (long)", test_8bit_16bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
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Case("9-bit frames with 16-bit data, 1 MHz (long)", test_9bit_16bit_0_1mhz_long_transfer, greentea_failure_handler),
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Case("9-bit frames with 16-bit data, 1 MHz, DMA (long)", test_9bit_16bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
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Case("16-bit frames with 16-bit data, 1 MHz (long)", test_16bit_16bit_0_1mhz_long_transfer, greentea_failure_handler),
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Case("16-bit frames with 16-bit data, 1 MHz, DMA (long)", test_16bit_16bit_0_1mhz_long_dma_transfer, greentea_failure_handler),
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#else
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Case("Dummy case", test_dummy, greentea_failure_handler)
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#endif
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};
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utest::v1::status_t greentea_test_setup(const size_t number_of_cases) {
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GREENTEA_SETUP(25, "default_auto");
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return greentea_test_setup_handler(number_of_cases);
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}
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Specification specification(greentea_test_setup, cases, greentea_test_teardown_handler);
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||||
|
||||
int main() {
|
||||
#if TEST
|
||||
cs = 1;
|
||||
cb.attach(callbackFunction);
|
||||
init_timer();
|
||||
#endif
|
||||
Harness::run(specification);
|
||||
}
|
||||
Reference in New Issue
Block a user