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2026-06-01 20:15:04 +03:00
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521
targets/TARGET_TOSHIBA/TARGET_TMPM4G9/Periph_Driver/inc/txz_adc.h Normal file
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/**
*******************************************************************************
* @file txz_adc.h
* @brief This file provides all the functions prototypes for ADC driver.
* @version V1.0.0.0
* $Date:: 2017-09-12 13:52:12 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __ADC_H
#define __ADC_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
#include "txz_adc_ch.h"
/**
* @addtogroup Periph_Driver Peripheral Driver
* @{
*/
/**
* @defgroup ADC ADC
* @brief ADC Driver.
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup ADC_Exported_define ADC Exported Define
* @{
*/
/**
* @defgroup ADC_ChannelMax Channel Num Max
* @brief Max Num of channel.
* @{
*/
#define ADC_NUM_MAX ((uint32_t)24) /*!< Max Num of conversion. */
/**
* @}
*/ /* End of group ADC_ChannelMax */
/**
* @}
*/ /* End of group ADC_Exported_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
@defgroup ADC_Exported_define ADC Exported Define
@{
*/
/** @enum adc_sampling_period0_t
@brief Outside AIN sampling period.
*/
typedef enum
{
ADC_SAMPLING_PERIOD0_XN = 0x00, /*!< SCLK Period (1/SCLK)xN */
ADC_SAMPLING_PERIOD0_X2N = 0x08, /*!< SCLK Period (1/SCLK)x2N */
ADC_SAMPLING_PERIOD0_X3N = 0x10, /*!< SCLK Period (1/SCLK)x3N */
ADC_SAMPLING_PERIOD0_X4N = 0x18, /*!< SCLK Period (1/SCLK)x4N */
ADC_SAMPLING_PERIOD0_X16N = 0x28, /*!< SCLK Period (1/SCLK)x16N */
ADC_SAMPLING_PERIOD0_X64N = 0x38, /*!< SCLK Period (1/SCLK)x64N */
}adc_sampling_period0_t;
/** @enum adc_sampling_period1_t
@brief Outside AIN sampling period.
*/
typedef enum
{
ADC_SAMPLING_PERIOD1_XN = 0x000, /*!< SCLK Period (1/SCLK)xN */
ADC_SAMPLING_PERIOD1_X2N = 0x100, /*!< SCLK Period (1/SCLK)x2N */
ADC_SAMPLING_PERIOD1_X3N = 0x200, /*!< SCLK Period (1/SCLK)x3N */
ADC_SAMPLING_PERIOD1_X4N = 0x300, /*!< SCLK Period (1/SCLK)x4N */
ADC_SAMPLING_PERIOD1_X16N = 0x500, /*!< SCLK Period (1/SCLK)x16N */
ADC_SAMPLING_PERIOD1_X64N = 0x700, /*!< SCLK Period (1/SCLK)x64N */
}adc_sampling_period1_t;
/*! @enum adc_sclk_t
@brief Select AD prescaler output (SCLK).
*/
typedef enum
{
ADC_SCLK_1 = (0x00000000U), /*!< ADCLK/1 */
ADC_SCLK_2 = (0x00000001U), /*!< ADCLK/2 */
ADC_SCLK_4 = (0x00000002U), /*!< ADCLK/4 */
ADC_SCLK_8 = (0x00000003U), /*!< ADCLK/8 */
ADC_SCLK_16 = (0x00000004U), /*!< ADCLK/16 */
}adc_sclk_t;
/*! @enum adc_mod1_t
@brief Select SCLK Frequency Band (MOD1).
*/
typedef enum
{
ADC_MOD1_SCLK_1 = (0x00001000U), /*!< SCLK =< 40MHz > */
ADC_MOD1_SCLK_2 = (0x00003000U), /*!< 40MHz < SCLK =< 50MHz > */
ADC_MOD1_SCLK_3 = (0x00004000U), /*!< 50MHz < SCLK =< 60MHz > */
ADC_MOD1_SCLK_4 = (0x00106011U), /*!< 60MHz < SCLK =< 80MHz > */
}adc_mod1_t;
/*! @enum adc_mod2_t
@brief Select ADC Product Setting Value (MOD2).
*/
typedef enum
{
ADC_MOD2_TMPM4G9 = (0x00000000U), /*!< TMPM4G9 */
ADC_MOD2_CLEAR = (0x00000000U), /*!< Reset Value */
}adc_mod2_t;
/*! @enum adc_int_t
@brief Select Interrupt Enable/Disable.
*/
typedef enum
{
ADC_INT_DISABLE = (0x00000000U), /*!< Disable. */
ADC_INT_ENABLE = (0x00000080U), /*!< Enable. */
}adc_int_t;
/*! @enum adc_conversion_t
@brief Select conversion method.
*/
typedef enum
{
ADC_CONVERSION_DISABLE = (0x00000000U), /*!< Disable. */
ADC_CONVERSION_CNT = (0x00000100U), /*!< Continuation. */
ADC_CONVERSION_SGL = (0x00000200U), /*!< Single. */
ADC_CONVERSION_TRG = (0x00000300U), /*!< Universal Trigger. */
ADC_CONVERSION_HPTG = (0x00000400U), /*!< High Priority Trigger. */
}adc_conversion_t;
/*! @enum adc_dma_int_t
@brief Select DMA interrupt method.
*/
typedef enum
{
ADC_DMA_INT_SGL_DISABLE = (0x00000000U), /*!< Disable. */
ADC_DMA_INT_SGL_ENABLE = (0x00000020U), /*!< DMA Single interrupt Enable. */
ADC_DMA_INT_CNT_DISABLE = (0x00000000U), /*!< Disable. */
ADC_DMA_INT_CNT_ENABLE = (0x00000040U), /*!< DMA Continuation interrupt Enable. */
ADC_DMA_INT_TRG_DISABLE = (0x00000000U), /*!< Disable. */
ADC_DMA_INT_TRG_ENABLE = (0x00000010U), /*!< DMA Universal Trigger interrupt Enable. */
ADC_TRG_DISABLE = (0x00000000U), /*!< Universal Trigger Disable. */
ADC_TRG_ENABLE = (0x00000001U), /*!< Universal Trigger Enable. */
ADC_HPTG_DISABLE = (0x00000000U), /*!< High Priority Trigger Disable. */
ADC_HPTG_ENABLE = (0x00000002U), /*!< High Priority Trigger Enable. */
}adc_dma_int_t;
/*! @enum adc_ain_range_t
@brief Range of AIN Macro Definition.
Range of AIN be set "(ADC_AIN_RANGE_MIN <= Value <= ADC_AIN_RANGE_MAX)".
*/
typedef enum
{
ADC_AIN_RANGE_MIN = (0x00000000U), /*!< Minimum Value :AINx00 */
ADC_AIN_RANGE_MAX = (0x00000017U), /*!< Maximum Value :AINx23 */
}adc_ain_range_t;
/*! @enum adc_status_t
@brief AD Running Status.
*/
typedef enum
{
ADC_STATUS_MASK = (0x00000080U), /*!< for Mask. */
ADC_STATUS_SLEEP = (0x00000000U), /*!< Sleep. */
ADC_STATUS_RUNNING = (0x00000080U), /*!< Running. */
}adc_status_t;
/*! @enum adc_cnt_status_t
@brief Continuity Conversion Running Status.
*/
typedef enum
{
ADC_CNT_STATUS_MASK = (0x00000008U), /*!< for Mask. */
ADC_CNT_STATUS_SLEEP = (0x00000000U), /*!< Sleep. */
ADC_CNT_STATUS_RUNNING = (0x00000008U), /*!< Running. */
}adc_cnt_status_t;
/*! @enum adc_sgl_status_t
@brief Single Conversion Running Status.
*/
typedef enum
{
ADC_SGL_STATUS_MASK = (0x00000004U), /*!< for Mask. */
ADC_SGL_STATUS_SLEEP = (0x00000000U), /*!< Sleep. */
ADC_SGL_STATUS_RUNNING = (0x00000004U), /*!< Running. */
}adc_sgl_status_t;
/*! @enum adc_trg_status_t
@brief Trigger Conversion Running Status.
*/
typedef enum
{
ADC_TRG_STATUS_MASK = (0x00000002U), /*!< for Mask. */
ADC_TRG_STATUS_SLEEP = (0x00000000U), /*!< Sleep. */
ADC_TRG_STATUS_RUNNING = (0x00000002U), /*!< Running. */
}adc_trg_status_t;
/*! @enum adc_hpri_status_t
@brief Trigger Conversion Running Status.
*/
typedef enum
{
ADC_HPTG_STATUS_MASK = (0x00000001U), /*!< for Mask. */
ADC_HPTG_STATUS_SLEEP = (0x00000000U), /*!< Sleep. */
ADC_HPTG_STATUS_RUNNING = (0x00000001U), /*!< Running. */
}adc_hpri_status_t;
/*! @enum adcmpxen_t
@brief Select Enable, Disable setting(ADxCMPEN).
*/
typedef enum
{
ADCMP3EN_DISABLE = (0x00000000U), /*!< Disable. */
ADCMP3EN_ENABLE = (0x00000008U), /*!< Enable. */
ADCMP2EN_DISABLE = (0x00000000U), /*!< Disable. */
ADCMP2EN_ENABLE = (0x00000004U), /*!< Enable. */
ADCMP1EN_DISABLE = (0x00000000U), /*!< Disable. */
ADCMP1EN_ENABLE = (0x00000002U), /*!< Enable. */
ADCMP0EN_DISABLE = (0x00000000U), /*!< Disable. */
ADCMP0EN_ENABLE = (0x00000001U), /*!< Enable. */
}adcmpxen_t;
/*! @enum adcmpcnt_t
@brief Select Compare count num.
*/
typedef enum
{
ADCMPCNT_1 = (0x00000000U), /*!< 1 time */
ADCMPCNT_2 = (0x00000100U), /*!< 2 times */
ADCMPCNT_3 = (0x00000200U), /*!< 3 times */
ADCMPCNT_4 = (0x00000300U), /*!< 4 times */
ADCMPCNT_5 = (0x00000400U), /*!< 5 times */
ADCMPCNT_6 = (0x00000500U), /*!< 6 times */
ADCMPCNT_7 = (0x00000600U), /*!< 7 times */
ADCMPCNT_8 = (0x00000700U), /*!< 8 times */
ADCMPCNT_9 = (0x00000800U), /*!< 9 times */
ADCMPCNT_10 = (0x00000900U), /*!< 10 times */
ADCMPCNT_11 = (0x00000a00U), /*!< 11 times */
ADCMPCNT_12 = (0x00000b00U), /*!< 12 times */
ADCMPCNT_13 = (0x00000c00U), /*!< 13 times */
ADCMPCNT_14 = (0x00000d00U), /*!< 14 times */
ADCMPCNT_15 = (0x00000e00U), /*!< 15 times */
ADCMPCNT_16 = (0x00000f00U), /*!< 16 times */
}adcmpcnt_t;
/*! @enum adcmpcond_t
@brief Compare condition
*/
typedef enum
{
ADCMPCond_CNT = (0x00000000U), /*!< Continuous */
ADCMPCond_ACC = (0x00000040U), /*!< Accumulation */
}adcmpcond_t;
/*! @enum adcmpbigsml_t
@brief Compare Big, Small condition
*/
typedef enum
{
ADCMPBigSml_Big = (0x00000000U), /*!< Big */
ADCMPBigSml_Sml = (0x00000020U), /*!< Small */
}adcmpbigsml_t;
/*! @enum adcmpstr_t
@brief Select Compare Store register
*/
typedef enum
{
ADCMPStr_Reg0 = (0x00000000U), /*!< ADxREG0 */
ADCMPStr_Reg1 = (0x00000001U), /*!< ADxREG1 */
ADCMPStr_Reg2 = (0x00000002U), /*!< ADxREG2 */
ADCMPStr_Reg3 = (0x00000003U), /*!< ADxREG3 */
ADCMPStr_Reg4 = (0x00000004U), /*!< ADxREG4 */
ADCMPStr_Reg5 = (0x00000005U), /*!< ADxREG5 */
ADCMPStr_Reg6 = (0x00000006U), /*!< ADxREG6 */
ADCMPStr_Reg7 = (0x00000007U), /*!< ADxREG7 */
ADCMPStr_Reg8 = (0x00000008U), /*!< ADxREG8 */
ADCMPStr_Reg9 = (0x00000009U), /*!< ADxREG9 */
ADCMPStr_Reg10 = (0x0000000aU), /*!< ADxREG10 */
ADCMPStr_Reg11 = (0x0000000bU), /*!< ADxREG11 */
ADCMPStr_Reg12 = (0x0000000cU), /*!< ADxREG12 */
ADCMPStr_Reg13 = (0x0000000dU), /*!< ADxREG13 */
ADCMPStr_Reg14 = (0x0000000eU), /*!< ADxREG14 */
ADCMPStr_Reg15 = (0x0000000fU), /*!< ADxREG15 */
ADCMPStr_Reg16 = (0x00000010U), /*!< ADxREG16 */
ADCMPStr_Reg17 = (0x00000011U), /*!< ADxREG17 */
ADCMPStr_Reg18 = (0x00000012U), /*!< ADxREG18 */
ADCMPStr_Reg19 = (0x00000013U), /*!< ADxREG19 */
ADCMPStr_Reg20 = (0x00000014U), /*!< ADxREG20 */
ADCMPStr_Reg21 = (0x00000015U), /*!< ADxREG21 */
ADCMPStr_Reg22 = (0x00000016U), /*!< ADxREG22 */
ADCMPStr_Reg23 = (0x00000017U), /*!< ADxREG23 */
}adcmpstr_t;
/*! @enum adcexazain_t
@brief Select AIN no.
*/
typedef enum
{
ADCEXAZSEL_AIN0 = 0, /*!< AIN0 */
ADCEXAZSEL_AIN1, /*!< AIN1 */
ADCEXAZSEL_AIN2, /*!< AIN2 */
ADCEXAZSEL_AIN3, /*!< AIN3 */
ADCEXAZSEL_AIN4, /*!< AIN4 */
ADCEXAZSEL_AIN5, /*!< AIN5 */
ADCEXAZSEL_AIN6, /*!< AIN6 */
ADCEXAZSEL_AIN7, /*!< AIN7 */
ADCEXAZSEL_AIN8, /*!< AIN8 */
ADCEXAZSEL_AIN9, /*!< AIN9 */
ADCEXAZSEL_AIN10, /*!< AIN10 */
ADCEXAZSEL_AIN11, /*!< AIN11 */
ADCEXAZSEL_AIN12, /*!< AIN12 */
ADCEXAZSEL_AIN13, /*!< AIN13 */
ADCEXAZSEL_AIN14, /*!< AIN14 */
ADCEXAZSEL_AIN15, /*!< AIN15 */
ADCEXAZSEL_AIN16, /*!< AIN16 */
ADCEXAZSEL_AIN17, /*!< AIN17 */
ADCEXAZSEL_AIN18, /*!< AIN18 */
ADCEXAZSEL_AIN19, /*!< AIN19 */
ADCEXAZSEL_AIN20, /*!< AIN20 */
ADCEXAZSEL_AIN21, /*!< AIN21 */
ADCEXAZSEL_AIN22, /*!< AIN22 */
ADCEXAZSEL_AIN23, /*!< AIN23 */
}adcexazain_t;
/*! @enum adcexazsel_t
@brief Select sampling period, EXAS0 or EXAS1.
*/
typedef enum
{
ADCEXAZSEL_EXAZ0 = (0x00000000), /*< EXAZ0 */
ADCEXAZSEL_EXAZ1 = (0x00000001), /*< EXAZ1 */
}adcexazsel_t;
/*!
@}
*/ /* End of group ADC_Exported_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/*!
@defgroup ADC_Exported_typedef ADC Exported Typedef
@{
*/
/*----------------------------------*/
/*! @struct adc_clock_t
@brief Clock information structure definition.
*/
/*----------------------------------*/
typedef struct
{
adc_sampling_period0_t exaz0; /*!< Outside AIN0 Sampling period.
: Use @ref adc_sampling_period0_t. */
adc_sampling_period1_t exaz1; /*!< Outside AIN1 Sampling period.
: Use @ref adc_sampling_period1_t. */
adc_sclk_t vadcld; /*!< Select AD prescaler output (SCLK).
: Use @ref adc_sclk_t. */
uint32_t sampling_select; /*!< Sampling period select. : bit0-bit23 */
} adc_clock_t;
/*----------------------------------*/
/*! @struct adc_cmpx_t
@brief Clock information structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint32_t CMPEN; /*!< Enable Register status */
uint32_t CMPCNT; /*!< Compare count num. */
uint32_t CMPCond; /*!< Compare condition */
uint32_t CMPBigSml; /*!< Compare Big/Small condition */
uint32_t StrReg; /*!< Compare Store register */
uint32_t ADComp; /*!< ADxCMP0 register data */
void (*handle)(uint32_t id, TXZ_Result result); /*!< Notify Compare Done. */
} adc_cmpx_t;
/*----------------------------------*/
/*! @struct adc_initial_setting_t
@brief Initial setting structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint32_t id; /*!< ID: User value. */
adc_clock_t clk; /*!< Clock setting.
: Use @ref adc_clock_t. */
uint32_t mod1; /*!< AVDD3 voltage band setting.
: Use @ref adc_mod1_t. */
uint32_t mod2; /*!< Product info setting.
: Use @ref adc_mod2_t. */
adc_cmpx_t CMPxEN[4]; /*!< adc_cmpx_t. */
} adc_initial_setting_t;
/*----------------------------------*/
/*! @struct adc_channel_setting_t
@brief Channel Setting. \n
*/
/*----------------------------------*/
typedef struct
{
uint32_t interrupt; /*!< Interrupt Enable/Disable.
: Use @ref adc_dma_int_t. */
uint32_t type; /*!< Conversion Type.
: Use @ref adc_conversion_t. */
uint32_t ain; /*!< AIN. */
} adc_channel_setting_t;
/*----------------------------------*/
/*! @struct adc_internal_info_t
@brief Driver internal information structure definition.
*/
/*----------------------------------*/
typedef struct
{
adc_ch_t ch[ADC_NUM_MAX]; /*!< Channel Instance. */
} adc_internal_info_t;
/*----------------------------------*/
/*! @struct adc_t
@brief ADC handle structure definition.
*/
/*----------------------------------*/
typedef struct
{
TSB_AD_TypeDef *p_instance; /*!< Registers base address. */
adc_initial_setting_t init; /*!< Initial setting. */
adc_internal_info_t info; /*!< Driver internal information. */
struct
{
void (*single)(uint32_t id, TXZ_Result result); /*!< Notify Single Conversion Done. */
void (*continuity)(uint32_t id, TXZ_Result result); /*!< Notify Continuity Conversion Done. */
void (*trigger)(uint32_t id, TXZ_Result result); /*!< Notify Trigger Conversion Done. */
void (*highpriority)(uint32_t id, TXZ_Result result); /*!< Notify HighPriority Conversion Done. */
} handler; /*!< Handler structure. */
} adc_t;
/**
* @}
*/ /* End of group ADC_Exported_typedef */
/*------------------------------------------------------------------------------*/
/* Functions */
/*------------------------------------------------------------------------------*/
/**
* @defgroup ADC_Exported_functions ADC Exported Functions
* @{
*/
TXZ_Result adc_init(adc_t *p_obj);
TXZ_Result adc_deinit(adc_t *p_obj);
TXZ_Result adc_mode1_setting(void);
TXZ_Result adc_channel_setting(adc_t *p_obj, uint32_t ch, adc_channel_setting_t *p_setting);
TXZ_Result adc_channel_clear(adc_t *p_obj, uint32_t ch);
TXZ_Result adc_cmp_init(adc_t *p_obj, adc_cmpx_t *p_cmpx_t);
TXZ_Result adc_cmp_deinit(adc_t *p_obj, adc_cmpx_t *p_cmpx_t);
TXZ_Result adc_channel_get_value(adc_t *p_obj, uint32_t ch, uint32_t *p_value);
TXZ_Result adc_start(adc_t *p_obj);
TXZ_Result adc_stop(adc_t *p_obj);
TXZ_Result adc_get_status(adc_t *p_obj, uint32_t *p_status);
TXZ_WorkState adc_poll_conversion(adc_t *p_obj, uint32_t timeout);
void adc_compa_irq_handler( void );
void adc_compb_irq_handler( void );
void adc_single_irq_handler( void );
void adc_continuity_irq_handler( void );
void adc_trigger_irq_handler( void );
/**
* @}
*/ /* End of group ADC_Exported_functions */
/**
* @}
*/ /* End of group ADC */
/**
* @}
*/ /* End of group Periph_Driver */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __ADC_H */

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targets/TARGET_TOSHIBA/TARGET_TMPM4G9/Periph_Driver/inc/txz_adc_ch.h Normal file
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/**
*******************************************************************************
* @file txz_adc_ch.h
* @brief This file provides all the functions prototypes for ADC driver. \n
* Channel Class.
* @version V1.0.0.0
* $Date:: 2017-09-07 13:52:12 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __TXZ_ADC_CH_H
#define __TXZ_ADC_CH_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
/**
* @addtogroup Periph_Driver Peripheral Driver
* @{
*/
/**
* @defgroup ADC ADC
* @brief ADC Driver.
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup ADC_Exported_define ADC Exported Define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group ADC_Exported_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup ADC_Exported_define ADC Exported Define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group ADC_Exported_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup ADC_Exported_typedef ADC Exported Typedef
* @{
*/
/*----------------------------------*/
/*! @struct adc_ch_initial_setting_t
* @brief Initialize Setting.
*/
/*----------------------------------*/
typedef struct
{
uint32_t interrupt; /*!< Interrupt Enable/Disable.
: Use @ref adc_dma_int_t. */
uint32_t type; /*!< Conversion Type.
: Use @ref adc_conversion_t. */
uint32_t ain; /*!< AIN. */
} adc_ch_initial_setting_t;
/*----------------------------------*/
/*! @struct adc_ch_t
* @brief ADC handle structure definenition.
*/
/*----------------------------------*/
typedef struct
{
__IO uint32_t *p_tset; /*!< ADxTSETn Address. */
__I uint32_t *p_reg; /*!< ADxREGx Address. */
adc_ch_initial_setting_t init; /*!< Initial setting. */
} adc_ch_t;
/**
* @}
*/ /* End of group ADC_Exported_typedef */
/*------------------------------------------------------------------------------*/
/* Functions */
/*------------------------------------------------------------------------------*/
/**
* @defgroup ADC_Exported_functions ADC Exported Functions
* @{
*/
uint32_t get_conversion_data(uint32_t reg);
TXZ_Result adc_ch_init(adc_ch_t *p_obj);
TXZ_Result adc_ch_deinit(adc_ch_t *p_obj);
TXZ_Result adc_ch_int_enable(adc_ch_t *p_obj);
TXZ_Result adc_ch_int_disable(adc_ch_t *p_obj);
TXZ_Result adc_ch_get_value(adc_ch_t *p_obj, uint32_t *p_value);
/**
* @}
*/ /* End of group ADC_Exported_functions */
/**
* @}
*/ /* End of group ADC */
/**
* @}
*/ /* End of group Periph_Driver */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __TXZ_ADC_CH_H */

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/**
*******************************************************************************
* @file txz_adc_include.h
* @brief This file provides internal common definition.
* @version V1.0.0.0
* $Date:: 2017-09-07 13:52:12 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __TXZ_ADC_INCLUDE_H
#define __TXZ_ADC_INCLUDE_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
#include "txz_hal.h"
/**
* @addtogroup Periph_Driver Peripheral Driver
* @{
*/
/**
* @defgroup ADC ADC
* @brief ADC Driver.
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup ADC_Private_define ADC Private Define
* @{
*/
/**
* @defgroup NULL_Pointer NULL Pointer
* @brief NULL Pointer.
* @{
*/
#define ADC_NULL ((void *)0) /*!< NULL Pointer. */
/**
* @}
*/ /* End of group NULL_Pointer */
/**
* @defgroup Parameter_Result Parameter Result
* @brief Whether the parameter is specified or not.
* @{
*/
#define ADC_PARAM_OK ((int32_t)1) /*!< Parameter is valid(specified). */
#define ADC_PARAM_NG ((int32_t)0) /*!< Parameter is invalid(not specified). */
/**
* @}
*/ /* End of group Parameter_Result */
/**
* @defgroup ADxCR0 ADxCR0
* @brief ADxCR0 Register.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-8 | - |
* | 7 | ADEN |
* | 6-3 | - |
* | 2 | HPSGL |
* | 1 | SGL |
* | 0 | CNT |
* @{
*/
/* ADEN */
#define ADxCR0_ADEN_DISABLE ((uint32_t)0x00000000) /*!< ADEN :Disable */
#define ADxCR0_ADEN_ENABLE ((uint32_t)0x00000080) /*!< ADEN :Enable */
/* HPSGL */
#define ADxCR0_HPSGL_ENABLE ((uint32_t)0x00000004) /*!< HPSGL :Enable */
/* SGL */
#define ADxCR0_SGL_ENABLE ((uint32_t)0x00000002) /*!< SGL :Enable */
/* CNT */
#define ADxCR0_CNT_MASK ((uint32_t)0x00000001) /*!< CNT :Mask */
#define ADxCR0_CNT_DISABLE ((uint32_t)0x00000000) /*!< CNT :Disable */
#define ADxCR0_CNT_ENABLE ((uint32_t)0x00000001) /*!< CNT :Enable */
/**
* @}
*/ /* End of group ADxCR0 */
/**
* @defgroup ADxCR1 ADxCR1
* @brief ADxCR1 Register.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-8 | - |
* | 7 | HPDMEN |
* | 6 | CNTDMEN |
* | 5 | SGLDMEN |
* | 4 | TRGDMEN |
* | 3:2 | - |
* | 1 | HPTRGEN |
* | 0 | TRGEN |
* @{
*/
/* HPDMEN */
#define ADxCR1_HPDMEN_DISABLE ((uint32_t)0x00000000) /*!< HPDMEN :Disable */
#define ADxCR1_HPDMEN_ENABLE ((uint32_t)0x00000080) /*!< HPDMEN :Enable */
/* CNTDMEN */
#define ADxCR1_CNTDMEN_DISABLE ((uint32_t)0x00000000) /*!< CNTDMEN :Disable */
#define ADxCR1_CNTDMEN_ENABLE ((uint32_t)0x00000040) /*!< CNTDMEN :Enable */
/* SGLDMEN */
#define ADxCR1_SGLDMEN_DISABLE ((uint32_t)0x00000000) /*!< SGLDMEN :Disable */
#define ADxCR1_SGLDMEN_ENABLE ((uint32_t)0x00000020) /*!< SGLDMEN :Enable */
/* TRGDMEN */
#define ADxCR1_TRGDMEN_DISABLE ((uint32_t)0x00000000) /*!< TRGDMEN :Disable */
#define ADxCR1_TRGDMEN_ENABLE ((uint32_t)0x00000010) /*!< TRGDMEN :Enable */
/* HPTRGEN */
#define ADxCR1_HPTRGEN_DISABLE ((uint32_t)0x00000000) /*!< HPTRGEN :Disable */
#define ADxCR1_HPTRGEN_ENABLE ((uint32_t)0x00000002) /*!< HPTRGEN :Enable */
/* TRGEN */
#define ADxCR1_TRGEN_DISABLE ((uint32_t)0x00000000) /*!< TRGEN :Disable */
#define ADxCR1_TRGEN_ENABLE ((uint32_t)0x00000001) /*!< TRGEN :Enable */
/**
* @}
*/ /* End of group ADxCR1 */
/**
* @defgroup ADxST ADxST
* @brief ADxST Register.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-8 | - |
* | 7 | ADBF |
* | 6-4 | - |
* | 3 | CNTF |
* | 2 | SNGF |
* | 1 | TRGF |
* | 0 | HPF |
* @{
*/
/* ADBF */
#define ADxST_ADBF_MASK ((uint32_t)0x00000080) /*!< ADBF :Mask. */
#define ADxST_ADBF_IDLE ((uint32_t)0x00000000) /*!< ADBF :Idle. Can stop ADCLK. */
#define ADxST_ADBF_RUN ((uint32_t)0x00000080) /*!< ADBF :Running. Can't stop ADCLK. */
/* CNTF */
#define ADxST_CNTF_MASK ((uint32_t)0x00000008) /*!< CNTF :Mask. */
#define ADxST_CNTF_IDLE ((uint32_t)0x00000000) /*!< CNTF :Idle. */
#define ADxST_CNTF_RUN ((uint32_t)0x00000008) /*!< CNTF :Running. */
/* SNGF */
#define ADxST_SNGF_MASK ((uint32_t)0x00000004) /*!< SNGF :Mask. */
#define ADxST_SNGF_IDLE ((uint32_t)0x00000000) /*!< SNGF :Idle. */
#define ADxST_SNGF_RUN ((uint32_t)0x00000004) /*!< SNGF :Running. */
/* TRGF */
#define ADxST_TRGF_MASK ((uint32_t)0x00000002) /*!< TRGF :Mask. */
#define ADxST_TRGF_IDLE ((uint32_t)0x00000000) /*!< TRGF :Idle. */
#define ADxST_TRGF_RUN ((uint32_t)0x00000002) /*!< TRGF :Running. */
/* PMDF */
#define ADxST_HPF_MASK ((uint32_t)0x00000001) /*!< HPF :Mask. */
#define ADxST_HPF_IDLE ((uint32_t)0x00000000) /*!< HPF :Idle. */
#define ADxST_HPF_RUN ((uint32_t)0x00000001) /*!< HPF :Running. */
/**
* @}
*/ /* End of group ADxST */
/**
* @defgroup ADxMOD0 ADxMOD0.
* @brief ADxMOD0 Register.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-2 | - |
* | 1 | RCUT |
* | 0 | DACON |
* @{
*/
/* RCUT */
#define ADxMOD0_RCUT_NORMAL ((uint32_t)0x00000000) /*!< RCUT :Normal */
#define ADxMOD0_RCUT_IREF_CUT ((uint32_t)0x00000002) /*!< RCUT :Iref cut */
/* DACON */
#define ADxMOD0_DACON_OFF ((uint32_t)0x00000000) /*!< DACON :DAC off */
#define ADxMOD0_DACON_ON ((uint32_t)0x00000001) /*!< DACON :DAC on */
/**
* @}
*/ /* End of group ADxMOD0 */
/**
* @name ADxCMPEN Macro Definition.
* @brief ADxCMPEN Register Macro Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-4 | - |
* | 3 | CMP3EN |
* | 2 | CMP2EN |
* | 1 | CMP1EN |
* | 0 | CMP0EN |
* @{
*/
/* CMP3EN */
#define ADxCMPEN_CMP3EN_DISABLE ((uint32_t)0x00000000) /*!< CMP3EN :Disable */
#define ADxCMPEN_CMP3EN_ENABLE ((uint32_t)0x00000008) /*!< CMP3EN :Enable */
/* CMP2EN */
#define ADxCMPEN_CMP2EN_DISABLE ((uint32_t)0x00000000) /*!< CMP2EN :Disable */
#define ADxCMPEN_CMP2EN_ENABLE ((uint32_t)0x00000004) /*!< CMP2EN :Enable */
/* CMP1EN */
#define ADxCMPEN_CMP1EN_DISABLE ((uint32_t)0x00000000) /*!< CMP1EN :Disable */
#define ADxCMPEN_CMP1EN_ENABLE ((uint32_t)0x00000002) /*!< CMP1EN :Enable */
/* CMP0EN */
#define ADxCMPEN_CMP0EN_DISABLE ((uint32_t)0x00000000) /*!< CMP0EN :Disable */
#define ADxCMPEN_CMP0EN_ENABLE ((uint32_t)0x00000001) /*!< CMP0EN :Enable */
/**
* @}
*/ /* End of name ADxCMPEN Macro Definition */
/**
* @name ADxTSETn Macro Definition.
* @brief ADxTSETn Register Macro Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-8 | - |
* | 7 | ENINT0 |
* | 6-5 | TRGS0[1:0] |
* | 4-0 | AINST0[4:0]|
* @{
*/
/* ENINT0 */
#define ADxTSETn_ENINT_MASK ((uint32_t)0x00000080) /*!< ENINT :Mask */
#define ADxTSETn_ENINT_DISABLE ((uint32_t)0x00000000) /*!< ENINT :Disable */
#define ADxTSETn_ENINT_ENABLE ((uint32_t)0x00000080) /*!< ENINT :Enable */
/* TRGS0[1:0] */
#define ADxTSETn_TRGS_DISABLE ((uint32_t)0x00000000) /*!< TRGS :Disable */
#define ADxTSETn_TRGS_CNT ((uint32_t)0x00000100) /*!< TRGS :Continuation */
#define ADxTSETn_TRGS_SGL ((uint32_t)0x00000200) /*!< TRGS :Single */
#define ADxTSETn_TRGS_TRG ((uint32_t)0x00000300) /*!< TRGS :Universal Trigger */
#define ADxTSETn_TRGS_PRI ((uint32_t)0x00000400) /*!< TRGS :Priority Trigger */
/**
* @}
*/ /* End of name ADxTSETn Macro Definition */
/**
* @name ADxREGn Macro Definition.
* @brief ADxREGn Register Macro Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-30 | - |
* | 29 | ADOVRF_Mn |
* | 28 | ADRF_Mn |
* | 27-16 | ADR_Mn[11:0] |
* | 15-4 | ADRn[11:0] |
* | 3-2 | - |
* | 1 | ADOVRFn |
* | 0 | ADRFn |
* @{
*/
/* ADOVRF_Mn */
#define ADxREGn_ADOVRF_Mn_MASK ((uint32_t)0x20000000) /*!< ADOVRF_Mn :Mask */
#define ADxREGn_ADOVRF_Mn_OFF ((uint32_t)0x00000000) /*!< ADOVRF_Mn :Flag off. */
#define ADxREGn_ADOVRF_Mn_ON ((uint32_t)0x20000000) /*!< ADOVRF_Mn :Flag on */
/* ADRF_Mn */
#define ADxREGn_ADRF_Mn_MASK ((uint32_t)0x10000000) /*!< ADRF_Mn :Mask */
#define ADxREGn_ADRF_Mn_OFF ((uint32_t)0x00000000) /*!< ADRF_Mn :Flag off. */
#define ADxREGn_ADRF_Mn_ON ((uint32_t)0x10000000) /*!< ADRF_Mn :Flag on */
/* ADR_Mn */
#define ADxREGn_ADR_Mn_MASK ((uint32_t)0x0FFF0000) /*!< ADR_Mn :Mask */
/* ADRn */
#define ADxREGn_ADRn_MASK ((uint32_t)0x0000FFF0) /*!< ADRn :Mask */
/* ADOVRFn */
#define ADxREGn_ADOVRFn_MASK ((uint32_t)0x00000002) /*!< ADOVRF_Mn :Mask */
#define ADxREGn_ADOVRFn_OFF ((uint32_t)0x00000000) /*!< ADOVRF_Mn :Flag off. */
#define ADxREGn_ADOVRFn_ON ((uint32_t)0x00000002) /*!< ADOVRF_Mn :Flag on */
/* ADRFn */
#define ADxREGn_ADRFn_MASK ((uint32_t)0x00000001) /*!< ADRFn :Mask */
#define ADxREGn_ADRFn_OFF ((uint32_t)0x00000000) /*!< ADRFn :Flag off. */
#define ADxREGn_ADRFn_ON ((uint32_t)0x00000001) /*!< ADRFn :Flag on */
/**
* @}
*/ /* End of name ADxREGn Macro Definition */
/**
* @}
*/ /* End of group ADC_Private_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup ADC_Private_define ADC Private Define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group ADC_Private_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup ADC_Private_typedef ADC Private Typedef
* @{
*/
/* no define */
/**
* @}
*/ /* End of group ADC_Private_typedef */
/*------------------------------------------------------------------------------*/
/* Inline Functions */
/*------------------------------------------------------------------------------*/
/**
* @defgroup ADC_Private_fuctions ADC Private Fuctions
* @{
*/
/* no define */
/**
* @}
*/ /* End of group ADC_Private_functions */
/**
* @}
*/ /* End of group ADC */
/**
* @}
*/ /* End of group Periph_Driver */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __TXZ_ADC_INCLUDE_H */

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/**
*******************************************************************************
* @file txz_cg.h
* @brief This file provides all the functions prototypes for CG driver.
* @version V1.0.0.0
* $Date:: 2018-04-02 19:31:41 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __CG_H
#define __CG_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
/**
* @addtogroup Periph_Driver
* @{
*/
/**
* @defgroup CG CG
* @brief CG Driver.
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup CG_Exported_define CG Exported Define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group CG_Exported_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup CG_Exported_define CG Exported Define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group CG_Exported_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup CG_Exported_typedef CG Exported Typedef
* @{
*/
/**
* @brief CG member.
*/
/*----------------------------------*/
typedef struct
{
TSB_CG_TypeDef *p_instance; /*!< Registers base address. */
} cg_t;
/**
* @}
*/ /* End of group CG_Exported_typedef */
/*------------------------------------------------------------------------------*/
/* Functions */
/*------------------------------------------------------------------------------*/
/**
* @defgroup CG_Exported_functions CG Exported Functions
* @{
*/
uint32_t cg_get_fsysm(cg_t *p_obj);
uint32_t cg_get_phyt0(cg_t *p_obj);
uint32_t cg_get_mphyt0(cg_t *p_obj);
TXZ_Result cg_ihosc_enable(cg_t *p_obj);
TXZ_Result cg_ihosc_disable(cg_t *p_obj);
/**
* @}
*/ /* End of group CG_Exported_functions */
/**
* @}
*/ /* End of group CG */
/**
* @}
*/ /* End of group Periph_Driver */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __CG_H */

118
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/**
*******************************************************************************
* @file txz_driver_def.h
* @brief All common macro and definition for TXZ peripheral drivers
* @version V1.0.0.0
* $Date:: 2017-07-21 15:39:36 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __TXZ_DRIVER_DEF_H
#define __TXZ_DRIVER_DEF_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup Periph_Driver Peripheral Driver
* @{
*/
/** @defgroup TXZ_DRIVER_DEF TXZ DRIVER DEF
* @brief All common macro and definition for TXZ peripheral drivers
* @{
*/
/** @defgroup Device_Header_Included Device Header Included
* @brief Include the Device header file of a Target.
* @{
*/
#include "TMPM4G9.h" /*!< TMPM4Gx Group Header file. */
/**
* @}
*/ /* End of group Device_Header */
/** @defgroup TXZ_Exported_typedef TXZ Exported typedef
* @{
*/
typedef enum {
TXZ_SUCCESS = 0U,
TXZ_ERROR = 1U
} TXZ_Result;
typedef enum {
TXZ_BUSY = 0U,
TXZ_DONE = 1U
} TXZ_WorkState;
typedef enum {
TXZ_DISABLE = 0U,
TXZ_ENABLE = 1U
} TXZ_FunctionalState;
/**
* @}
*/ /* End of group TXZ_Exported_typedef */
/** @defgroup TXZ_Exported_macro TXZ Exported macro
* @{
*/
#define IS_TXZ_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
#define IS_POINTER_NOT_NULL(param) ((void*)(param)!=(void*)0)
/**
* @brief To report the name of the source file and source line number where the
* assert_param error has occurred, "DEBUG" must be defined. And detailed
* definition of assert_failed() is needed to be implemented, which can be
* done, for example, in the main.c file.
*/
#ifdef DEBUG
void assert_failed(char *file, int32_t line);
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((char *)__FILE__, __LINE__))
#else
#define assert_param(expr)
#endif /* DEBUG */
/**
* @}
*/ /* End of group TXZ_Exported_macro */
/**
* @}
*/ /* End of group Periph_Driver */
/**
* @}
*/ /* End of group TXZ_DRIVER_DEF */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __TXZ_DRIVER_DEF_H */

159
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/**
*******************************************************************************
* @file fc.h
* @brief Flash_Userboot Sample Application.
* @version V1.0.0.0
* $date:: $
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __FC_H
#define __FC_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/* Includes ------------------------------------------------------------------*/
#include "txz_driver_def.h"
#if defined(__FC_H)
/** @addtogroup Periph driver
* @{
*/
/** @defgroup fc
* @brief fc
* @{
*/
/** @defgroup FlashApi_Exported_Types
* @{
*/
/**
* @enum fc_sr0_t
* @brief Enumerated type definition of the FCSR0 register.
*/
typedef enum {
FC_SR0_RDYBSY = (0x00000001UL) /*!< 0:Busy, 1:Ready all flash */
} fc_sr0_t;
/*----------------------------------*/
/**
* @enum fc_erase_kind_t
* @brief FC Erase Flash Kind structure definenition.
*/
/*----------------------------------*/
typedef enum {
FC_ERASE_KIND_PAGE = (0x00000040UL), /*!< Page Erase */
FC_ERASE_KIND_BLOCK = (0x00000030UL) /*!< Block Erase */
} fc_erase_kind_t;
typedef enum {
FC_CODE_FLASH_PAGE0 = 0, /*!< (0x5E000000UL), CODE FLASH Page0 */
FC_CODE_FLASH_PAGE1, /*!< (0x5E001000UL), CODE FLASH Page1 */
FC_CODE_FLASH_PAGE2, /*!< (0x5E002000UL), CODE FLASH Page2 */
FC_CODE_FLASH_PAGE3, /*!< (0x5E003000UL), CODE FLASH Page3 */
FC_CODE_FLASH_PAGE4, /*!< (0x5E004000UL), CODE FLASH Page4 */
FC_CODE_FLASH_PAGE5, /*!< (0x5E005000UL), CODE FLASH Page5 */
FC_CODE_FLASH_PAGE6, /*!< (0x5E006000UL), CODE FLASH Page6 */
FC_CODE_FLASH_PAGE7, /*!< (0x5E007000UL), CODE FLASH Page7 */
FC_CODE_FLASH_PAGE8, /*!< (0x5E008000UL), CODE FLASH Page8 */
FC_CODE_FLASH_PAGE9, /*!< (0x5E009000UL), CODE FLASH Page9 */
FC_CODE_FLASH_PAGE10, /*!< (0x5E00A000UL), CODE FLASH Page10 */
FC_CODE_FLASH_PAGE11, /*!< (0x5E00B000UL), CODE FLASH Page11 */
FC_CODE_FLASH_PAGE12, /*!< (0x5E00C000UL), CODE FLASH Page12 */
FC_CODE_FLASH_PAGE13, /*!< (0x5E00D000UL), CODE FLASH Page13 */
FC_CODE_FLASH_PAGE14, /*!< (0x5E00E000UL), CODE FLASH Page14 */
FC_CODE_FLASH_PAGE15, /*!< (0x5E00F000UL), CODE FLASH Page15 */
FC_CODE_FLASH_PAGE16, /*!< (0x5E010000UL), CODE FLASH Page16 */
FC_CODE_FLASH_PAGE17, /*!< (0x5E011000UL), CODE FLASH Page17 */
FC_CODE_FLASH_PAGE18, /*!< (0x5E012000UL), CODE FLASH Page18 */
FC_CODE_FLASH_PAGE19, /*!< (0x5E013000UL), CODE FLASH Page19 */
FC_CODE_FLASH_PAGE20, /*!< (0x5E014000UL), CODE FLASH Page20 */
FC_CODE_FLASH_PAGE21, /*!< (0x5E015000UL), CODE FLASH Page21 */
FC_CODE_FLASH_PAGE22, /*!< (0x5E016000UL), CODE FLASH Page22 */
FC_CODE_FLASH_PAGE23, /*!< (0x5E017000UL), CODE FLASH Page23 */
FC_CODE_FLASH_PAGE24, /*!< (0x5E018000UL), CODE FLASH Page24 */
FC_CODE_FLASH_PAGE25, /*!< (0x5E019000UL), CODE FLASH Page25 */
FC_CODE_FLASH_PAGE26, /*!< (0x5E01A000UL), CODE FLASH Page26 */
FC_CODE_FLASH_PAGE27, /*!< (0x5E01B000UL), CODE FLASH Page27 */
FC_CODE_FLASH_PAGE28, /*!< (0x5E01C000UL), CODE FLASH Page28 */
FC_CODE_FLASH_PAGE29, /*!< (0x5E01D000UL), CODE FLASH Page29 */
FC_CODE_FLASH_PAGE30, /*!< (0x5E01E000UL), CODE FLASH Page30 */
FC_CODE_FLASH_PAGE31 /*!< (0x5E01F000UL), CODE FLASH Page31 */
} fc_code_flash_page_number_t;
/** @} */
/* End of group FlashApi_Exported_Types */
/** @defgroup FlashApi_Exported_Constants
* @{
*/
//#define FC_RAMADDRESSTOP (0x20000000UL) /*!< RAM Address Top */
//#define FC_RAMADDRESSEND (0x20003fffUL) /*!< RAM Address End */
#define FC_CODE_FLASH_ADDRESS_TOP (0x5E000000UL) /*!< CODE FLASH Address Top */
//#define FC_CODEFLASHADDRESSEND (0x5E01FFFFUL) /*!< CODE FLASH Address End */
#define FC_PAGE_SIZE (0x1000) /*!< The number of bytes in a page. */
//#define FC_CODEFLASHPAGESIZE (0x1000) /*!< CODE FLASH PAGE SIZE */
#define FC_CODE_FLASH_WRITE_SIZE (sizeof(uint32_t)*4) /*!< CODE FLASH WRITE SIZE */
/** @} */
/* End of group FlashApi_Exported_Constants */
/** @weakgroup FlashApi_Exported_FunctionPrototypes
* @{
*/
TXZ_WorkState fc_get_status(fc_sr0_t status);
TXZ_Result fc_write_code_flash(uint32_t* src_address, uint32_t* dst_address, uint32_t size);
TXZ_Result fc_erase_page_code_flash(fc_code_flash_page_number_t first_page, uint8_t num_of_pages);
TXZ_Result fc_blank_check_page_code_flash(fc_code_flash_page_number_t first_page, fc_code_flash_page_number_t lasr_page);
TXZ_Result fc_erase_block_code_flash(uint32_t *top_addr, uint32_t *blk_addr);
/** @} */
/* End of group FlashApi_Exported_FunctionPrototypes */
/** @} */
/* End of group fc */
/** @} */
/* End of group Periph_driver */
#endif /* defined(__FC_H) */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __FC_H */

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/**
*******************************************************************************
* @file txz_fuart.h
* @brief This file provides all the functions prototypes for FUART driver.
* @version V1.0.0.0
* $Date:: 2017-08-06 10:43:01 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __FUART_H
#define __FUART_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
/**
* @addtogroup Periph_Driver
* @{
*/
/**
* @defgroup FUART FUART
* @brief FUART Driver.
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup FUART_Exported_define FUART Exported Define
* @{
*/
/**
* @defgroup FUART_FifoMax Max Num of FIFO
* @brief Max Num of Tx/Rx Fifo.
* @{
*/
#define FUART_TX_FIFO_MAX ((uint32_t)0x00000020) /*!< TX FIFO Max. */
#define FUART_RX_FIFO_MAX ((uint32_t)0x00000020) /*!< RX FIFO Max. */
/**
* @}
*/ /* End of group UART_FifoMax */
/**
* @defgroup FUART_CTSHandshake CTS Handshake
* @brief Available CTS Handshake Macro Definition.
* @{
*/
#define FUART_CTS_DISABLE ((uint32_t)0x00000000) /*!< Not Available. */
#define FUART_CTS_ENABLE ((uint32_t)0x00008000) /*!< Available. */
/**
* @}
*/ /* End of group FUART_CTSHandshake */
/**
* @defgroup FUART_RTSHandshake RTS Handshake
* @brief Available RTS Handshake Macro Definition.
* @{
*/
#define FUART_RTS_DISABLE ((uint32_t)0x00000000) /*!< Not Available. */
#define FUART_RTS_ENABLE ((uint32_t)0x00004000) /*!< Available. */
/**
* @}
*/ /* End of group FUART_RTSHandshake */
/**
* @defgroup FUART_FIFO FIFO Enable
* @brief FIFO Enable Bit Macro Definition.
* @{
*/
#define FUART_FIFO_DISABLE ((uint32_t)0x00000000) /*!< Disable. */
#define FUART_FIFO_ENABLE ((uint32_t)0x00000010) /*!< Enable. */
/**
* @}
*/ /* End of group FUART_FIFO */
/**
* @defgroup FUART_StopBit Stop Bit
* @brief Stop Bit Macro Definition.
* @{
*/
#define FUART_STOP_BIT_1 ((uint32_t)0x00000000) /*!< 1 bit */
#define FUART_STOP_BIT_2 ((uint32_t)0x00000008) /*!< 2 bit */
/**
* @}
*/ /* End of group FUART_StopBit */
/**
* @defgroup FUART_ParityBit Parity Bit
* @brief Parity Bit Macro Definition.
* @{
*/
#define FUART_PARITY_BIT_ODD ((uint32_t)0x00000000) /*!< Odd Parity */
#define FUART_PARITY_BIT_EVEN ((uint32_t)0x00000004) /*!< Even Parity */
/**
* @}
*/ /* End of group FUART_ParityBit */
/**
* @defgroup FUART_ParityEnable Parity Enable
* @brief Enable/Disable Parity Macro Definition.
* @{
*/
#define FUART_PARITY_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define FUART_PARITY_ENABLE ((uint32_t)0x00000002) /*!< Enable */
/**
* @}
*/ /* End of group FUART_ParityEnable */
/**
* @defgroup FUART_StaticParityEnable Static Parity Enable
* @brief Enable/Disable Static Parity Macro Definition.
* @{
*/
#define FUART_STATIC_PARITY_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define FUART_STATIC_PARITY_ENABLE ((uint32_t)0x00000080) /*!< Enable */
/**
* @}
*/ /* End of group FUART_ParityEnable */
/**
* @defgroup FUART_DataLength Data Length
* @brief Data Length Macro Definition.
* @{
*/
#define FUART_DATA_LENGTH_5 ((uint32_t)0x00000000) /*!< 5 bit */
#define FUART_DATA_LENGTH_6 ((uint32_t)0x00000020) /*!< 6 bit */
#define FUART_DATA_LENGTH_7 ((uint32_t)0x00000040) /*!< 7 bit */
#define FUART_DATA_LENGTH_8 ((uint32_t)0x00000060) /*!< 8 bit */
/**
* @}
*/ /* End of group FUART_DataLength */
/**
* @defgroup FUART_FIFO_Level FIFO Level
* @brief FIFO Level Macro Definition.
* @{
*/
#define FUART_FIFO_LEVEL_4 ((uint32_t)0x00000000) /*!< 4 level */
#define FUART_FIFO_LEVEL_8 ((uint32_t)0x00000001) /*!< 8 level */
#define FUART_FIFO_LEVEL_16 ((uint32_t)0x00000002) /*!< 16 level */
#define FUART_FIFO_LEVEL_24 ((uint32_t)0x00000003) /*!< 24 level */
#define FUART_FIFO_LEVEL_28 ((uint32_t)0x00000004) /*!< 28 level */
/**
* @}
*/ /* End of group FUART_DataLength */
/**
* @defgroup FUART_TxInterrupt Tx Interrupt
* @brief Available Transmit Interrupt Macro Definition.
* @{
*/
#define FUART_TX_INT_DISABLE ((uint32_t)0x00000000) /*!< Not Available. */
#define FUART_TX_INT_ENABLE ((uint32_t)0x00000020) /*!< Available. */
/**
* @}
*/ /* End of group FUART_TxInterrupt */
/**
* @defgroup FUART_RxInterrupt Rx Interrupt
* @brief Available Receive Interrupt Macro Definition.
* @{
*/
#define FUART_RX_INT_DISABLE ((uint32_t)0x00000000) /*!< Not Available. */
#define FUART_RX_INT_ENABLE ((uint32_t)0x00000010) /*!< Available. */
/**
* @}
*/ /* End of group FUART_RxInterrupt */
/**
* @defgroup FUART_ErrorInterrupt Error Interrupt
* @brief Enable/Disable Error Interrupt Macro Definition.
* @{
*/
/**
* @defgroup FUART_OVER_RUN_ErrorInterrupt Over Run Error Interrupt
* @brief Enable/Disable Error Interrupt Macro Definition.
* @{
*/
#define FUART_OV_ERR_INT_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define FUART_OV_ERR_INT_ENABLE ((uint32_t)0x00000400) /*!< Enable */
/**
* @}
*/ /* End of group FUART_OVER_RUN_ErrorInterrupt */
/**
* @defgroup FUART_BREAK_ErrorInterrupt Break Error Interrupt
* @brief Enable/Disable Error Interrupt Macro Definition.
* @{
*/
#define FUART_BK_ERR_INT_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define FUART_BK_ERR_INT_ENABLE ((uint32_t)0x00000200) /*!< Enable */
/**
* @}
*/ /* End of group FUART_BREAK_ErrorInterrupt */
/**
* @defgroup FUART_PARITY_ErrorInterrupt Parity Error Interrupt
* @brief Enable/Disable Error Interrupt Macro Definition.
* @{
*/
#define FUART_PA_ERR_INT_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define FUART_PA_ERR_INT_ENABLE ((uint32_t)0x00000100) /*!< Enable */
/**
* @}
*/ /* End of group FUART_PARITY_ErrorInterrupt */
/**
* @defgroup FUART_FRAMING_ErrorInterrupt Framing Error Interrupt
* @brief Enable/Disable Error Interrupt Macro Definition.
* @{
*/
#define FUART_FR_ERR_INT_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define FUART_FR_ERR_INT_ENABLE ((uint32_t)0x00000080) /*!< Enable */
/**
* @}
*/ /* End of group FUART_FRAMING_ErrorInterrupt */
/**
* @defgroup FUART_RX_TIMEOUT_ErrorInterrupt Rx Timeout Error Interrupt
* @brief Enable/Disable Error Interrupt Macro Definition.
* @{
*/
#define FUART_TO_ERR_INT_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define FUART_TO_ERR_INT_ENABLE ((uint32_t)0x00000040) /*!< Enable */
/**
* @}
*/ /* End of group FUART_RX_TIMEOUT_RUN_ErrorInterrupt */
/**
* @}
*/ /* End of group FUART_ErrorInterrupt */
/**
* @defgroup FUART_RangeK Range K
* @brief Range of K Macro Definition.
* @brief Range of K be set "(UART_RANGE_K_MIN <= Value <= FUART_RANGE_K_MAX)".
* @{
*/
#define FUART_RANGE_K_MIN ((uint32_t)0x00000000) /*!< Minimum Value :K=0 */
#define FUART_RANGE_K_MAX ((uint32_t)0x0000003F) /*!< Maximum Value :K=63 */
/**
* @}
*/ /* End of group FUART_RangeK */
/**
* @defgroup FUART_RangeN Range N
* @brief Range of N Macro Definition.
* @brief Range of N be set "(UART_RANGE_N_MIN <= Value <= FUART_RANGE_N_MAX)".
* @{
*/
#define FUART_RANGE_N_MIN ((uint32_t)0x00000002) /*!< Minimum Value :N=2 */
#define FUART_RANGE_N_MAX ((uint32_t)0x0000FFFF) /*!< Maximum Value :N=65535 */
/**
* @}
*/ /* End of group FUART_RangeN */
/**
* @defgroup FUART_OverrunErr Overrun Error
* @brief Overrun Error Macro Definition.
* @{
*/
#define FUART_OVERRUN_NO_ERR ((uint32_t)0x00000000) /*!< No Error */
#define FUART_OVERRUN_ERR ((uint32_t)0x00000008) /*!< Error */
/**
* @}
*/ /* End of group FUART_OverrunErr */
/**
* @defgroup FUART_BreakErr Break Error
* @brief Break Error Macro Definition.
* @{
*/
#define FUART_BREAK_NO_ERR ((uint32_t)0x00000000) /*!< No Error */
#define FUART_BREAK_ERR ((uint32_t)0x00000004) /*!< Error */
/**
* @}
*/ /* End of group FUART_BreakErr */
/**
* @defgroup FUART_ParityErr Parity Error
* @brief Parity Error Macro Definition.
* @{
*/
#define FUART_PARITY_NO_ERR ((uint32_t)0x00000000) /*!< No Error */
#define FUART_PARITY_ERR ((uint32_t)0x00000002) /*!< Error */
/**
* @}
*/ /* End of group FUART_ParityErr */
/**
* @defgroup FUART_FramingErr Framing Error
* @brief Framing Error Macro Definition.
* @{
*/
#define FUART_FRAMING_NO_ERR ((uint32_t)0x00000000) /*!< No Error */
#define FUART_FRAMING_ERR ((uint32_t)0x00000001) /*!< Error */
/**
* @}
*/ /* End of group FUART_FramingErr */
/**
* @defgroup FUARTxFR FUARTxFR Register
* @brief FUARTxFR Register Definition.
* @{
*/
/* FR */
#define FUARTxFR_TXFE_MASK ((uint32_t)0x00000080) /*!< TXFE :Mask */
#define FUARTxFR_RXFF_MASK ((uint32_t)0x00000040) /*!< RXFF :Mask */
#define FUARTxFR_TXFF_MASK ((uint32_t)0x00000020) /*!< TXFF :Mask */
#define FUARTxFR_RXFE_MASK ((uint32_t)0x00000010) /*!< RXFE :Mask */
#define FUARTxFR_BUSY_MASK ((uint32_t)0x00000008) /*!< BUSY :Mask */
#define FUARTxFR_CTS_MASK ((uint32_t)0x00000001) /*!< CTS :Mask */
#define FUARTxFR_TXFE_FLAG_SET ((uint32_t)0x00000080) /*!< TXFE :Flag Set */
#define FUARTxFR_RXFF_FLAG_SET ((uint32_t)0x00000040) /*!< RXFF :Flag Set */
#define FUARTxFR_TXFF_FLAG_SET ((uint32_t)0x00000020) /*!< TXFF :Flag Set */
#define FUARTxFR_RXFE_FLAG_SET ((uint32_t)0x00000010) /*!< RXFE :Flag Set */
#define FUARTxFR_BUSY_FLAG_SET ((uint32_t)0x00000008) /*!< BUSY :Flag Set */
#define FUARTxFR_CTS_FLAG_SET ((uint32_t)0x00000001) /*!< CTS :Flag Set */
#define FUARTxFR_TXFE_FLAG_CLR ((uint32_t)0x00000000) /*!< TXFE :Flag Clear */
#define FUARTxFR_RXFF_FLAG_CLR ((uint32_t)0x00000000) /*!< RXFF :Flag Clear */
#define FUARTxFR_TXFF_FLAG_CLR ((uint32_t)0x00000000) /*!< TXFF :Flag Clear */
#define FUARTxFR_RXFE_FLAG_CLR ((uint32_t)0x00000000) /*!< RXFE :Flag Clear */
#define FUARTxFR_BUSY_FLAG_CLR ((uint32_t)0x00000000) /*!< BUSY :Flag Clear */
#define FUARTxFR_CTS_FLAG_CLR ((uint32_t)0x00000000) /*!< CTS :Flag Clear */
/**
* @}
*/ /* End of group FUARTxFR */
/**
* @}
*/ /* End of group FUART_Exported_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup FUART_Exported_define FUART Exported Define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group FUART_Exported_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup FUART_Exported_typedef FUART Exported Typedef
* @{
*/
/*----------------------------------*/
/**
* @brief Receive event information structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint8_t *p_data; /*!< The buffer to receive data. */
uint32_t num; /*!< The number of receive data. */
} fuart_receive_t;
/*----------------------------------*/
/**
* @brief Transmit data information structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint8_t *p_data; /*!< The buffer to transmit data. */
uint32_t num; /*!< The number of transmit data. */
} fuart_transmit_t;
/*----------------------------------*/
/**
* @brief Boudrate setting structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint32_t brk; /*!< Division Value K.
: K Range ( FUART_RANGE_K_MIN <= K =< FUART_RANGE_K_MAX ) @ref FUART_RangeK */
uint32_t brn; /*!< Division Value N.
: N Range ( FUART_RANGE_N_MIN <= N =< FUART_RANGE_N_MAX ) @ref FUART_RangeN */
} fuart_boudrate_t;
/*----------------------------------*/
/**
* @brief Transmit FIFO setting.
*/
/*----------------------------------*/
typedef struct
{
uint32_t inttx; /*!< Available Transmit Interrupt.
: Use @ref FUART_TxInterrupt */
uint32_t level; /*!< Transmit Fill Level.
: Use @ref FUART_FIFO_Level */
} fuart_tx_int_t;
/*----------------------------------*/
/**
* @brief Receive FIFO setting.
*/
/*----------------------------------*/
typedef struct
{
uint32_t intrx; /*!< Available Receive Interrupt.
: Use @ref FUART_RxInterrupt */
uint32_t level; /*!< Receive Fill Level.
: Use @ref FUART_FIFO_Level */
} fuart_rx_int_t;
/*----------------------------------*/
/**
* @brief Initial setting structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint32_t id; /*!< ID: User value. */
fuart_boudrate_t boudrate; /*!< Boudrate setting.
: Use @ref fuart_boudrate_t */
uint32_t interr; /*!< Available Error Interrupt.
: Use @ref FUART_ErrorInterrupt */
fuart_tx_int_t tx_int; /*!< Transmit Interrupt setting.
: Use @ref fuart_tx_int_t */
fuart_rx_int_t rx_int; /*!< Receive Interrupt setting.
: Use @ref fuart_rx_int_t */
uint32_t ctse; /*!< Available CTS Handshake.
: Use @ref FUART_CTSHandshake */
uint32_t rtse; /*!< Available RTS Handshake.
: Use @ref FUART_RTSHandshake */
uint32_t stpa; /*!< Enable/Disable Static Parity.
: Use @ref FUART_StaticParityEnable */
uint32_t sm; /*!< Data Length.
: Use @ref FUART_DataLength */
uint32_t fifo; /*!< Available FIFO.
: Use @ref FUART_FIFO */
uint32_t sblen; /*!< Stop Bit.
: Use @ref FUART_StopBit */
uint32_t even; /*!< Odd/Even Parity Bit.
: Use @ref FUART_ParityBit */
uint32_t pe; /*!< Enable/Disable Parity Bit.
: Use @ref FUART_ParityEnable */
} fuart_initial_setting_t;
/*----------------------------------*/
/**
* @brief FUART handle structure definition.
*/
/*----------------------------------*/
typedef struct
{
TSB_FURT_TypeDef *p_instance; /*!< Registers base address. */
fuart_initial_setting_t init; /*!< Initial setting. */
/*------------------------------------------*/
/*!
@brief Transmit Information.
*/
/*------------------------------------------*/
struct
{
uint32_t rp; /*!< Num of transmitted data. */
fuart_transmit_t info; /*!< Transmit Data Information. */
void (*handler)(uint32_t id, TXZ_Result result); /*!< Transmit Event handler. */
} transmit;
/*------------------------------------------*/
/*!
@brief Receive Information.
*/
/*------------------------------------------*/
struct
{
uint32_t wp; /*!< Num of received data. */
fuart_receive_t info; /*!< Receive Data Information. */
void (*handler)(uint32_t id, TXZ_Result result, fuart_receive_t *p_info); /*!< Receive Event handler. */
} receive;
} fuart_t;
/**
* @}
*/ /* End of group FUART_Exported_typedef */
/*------------------------------------------------------------------------------*/
/* Functions */
/*------------------------------------------------------------------------------*/
/**
* @defgroup FUART_Exported_functions FUART Exported Functions
* @{
*/
TXZ_Result fuart_init(fuart_t *p_obj);
TXZ_Result fuart_deinit(fuart_t *p_obj);
TXZ_Result fuart_discard_transmit(fuart_t *p_obj);
TXZ_Result fuart_discard_receive(fuart_t *p_obj);
TXZ_Result fuart_transmitIt(fuart_t *p_obj, fuart_transmit_t *p_info);
TXZ_Result fuart_receiveIt(fuart_t *p_obj, fuart_receive_t *p_info);
void fuart_transmit_irq_handler(fuart_t *p_obj);
void fuart_receive_irq_handler(fuart_t *p_obj);
void fuart_error_irq_handler(fuart_t *p_obj);
void fuart_irq_handler(fuart_t *p_obj);
TXZ_Result fuart_get_status(fuart_t *p_obj, uint32_t *p_status);
TXZ_Result fuart_get_error(fuart_t *p_obj, uint32_t *p_error);
TXZ_Result fuart_get_boudrate_setting(uint32_t clock, uint32_t boudrate, fuart_boudrate_t *p_setting);
/**
* @}
*/ /* End of group FUART_Exported_functions */
/**
* @}
*/ /* End of group FUART */
/**
* @}
*/ /* End of group Periph_Driver */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __UART_H */

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/**
*******************************************************************************
* @file txz_fuart_ex.h
* @brief This file provides all the functions prototypes for FUART driver.
* @brief Extended functionality.
* @version V1.0.0.0
* $Date:: 2017-08-06 10:43:01 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __FUART_EX_H
#define __FUART_EX_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
#include "txz_fuart.h"
/**
* @addtogroup Periph_Driver
* @{
*/
/**
* @addtogroup FUART
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup FUART_Exported_define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group FUART_Exported_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup FUART_Exported_define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group FUART_Exported_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup FUART_Exported_typedef
* @{
*/
/* no define */
/**
* @}
*/ /* End of group FUART_Exported_typedef */
/*------------------------------------------------------------------------------*/
/* Functions */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup FUART_Exported_functions
* @{
*/
TXZ_Result fuart_send_break(fuart_t *p_obj);
TXZ_Result fuart_stop_break(fuart_t *p_obj);
/**
* @}
*/ /* End of group FUART_Exported_functions */
/**
* @}
*/ /* End of group FUART */
/**
* @}
*/ /* End of group Periph_Driver */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __FUART_EX_H */

412
targets/TARGET_TOSHIBA/TARGET_TMPM4G9/Periph_Driver/inc/txz_fuart_include.h Normal file
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@@ -0,0 +1,412 @@
/**
*******************************************************************************
* @file txz_fuart_include.h
* @brief This file provides internal common definition.
* @version V1.0.0.0
* $Date:: 2017-08-06 10:43:01 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __FUART_INCLUDE_H
#define __FUART_INCLUDE_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
/**
* @addtogroup Periph_Driver
* @{
*/
/**
* @addtogroup FUART
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup FUART_Private_define
* @{
*/
/**
* @defgroup FUART_NullPointer Null Pointer
* @brief Null Pointer.
* @{
*/
#define FUART_NULL ((void *)0) /*!< Null Pointer. */
/**
* @}
*/ /* End of group FUART_NullPointer */
/**
* @defgroup FUART_ParameterResult Parameter Check Result
* @brief Whether the parameter is specified or not.
* @{
*/
#define FUART_PARAM_OK ((int32_t)1) /*!< Parameter is valid(specified). */
#define FUART_PARAM_NG ((int32_t)0) /*!< Parameter is invalid(not specified). */
/**
* @}
*/ /* End of group FUART_ParameterResult */
/**
* @defgroup FUARTxDR FUARTxDR Register
* @brief FUARTxDR Register Definition.
* @{
*/
/* DR */
#define FUARTxDR_DR_8BIT_MASK ((uint32_t)0x000000FF) /*!< DR :Mask for 8bit */
/**
* @}
*/ /* End of group FUARTxDR */
/**
* @defgroup FUARTxCR FUARTxCR Register
* @brief FUARTxCR Register Definition.
* @{
*/
#define FUARTxCR_CTSEN_MASK ((uint32_t)0x00008000) /*!< CTSEN :MASK. */
#define FUARTxCR_RTSEN_MASK ((uint32_t)0x00004000) /*!< RTSEN :MASK. */
#define FUARTxCR_RXE_MASK ((uint32_t)0x00000200) /*!< RXE :MASK. */
#define FUARTxCR_TXE_MASK ((uint32_t)0x00000100) /*!< TXE :MASK. */
#define FUARTxCR_UARTEN_MSK ((uint32_t)0x00000001) /*!< UARTEN :MASK. */
#define FUARTxCR_CTSEN_DISABLE ((uint32_t)0x00000000) /*!< CTSEN :Not Available. */
#define FUARTxCR_RTSEN_DISABLE ((uint32_t)0x00000000) /*!< RTSEN :Not Available. */
#define FUARTxCR_RXE_DISABLE ((uint32_t)0x00000000) /*!< RXE :Disable. */
#define FUARTxCR_TXE_DISABLE ((uint32_t)0x00000000) /*!< TXE :Disable. */
#define FUARTxCR_UARTEN_DISABLE ((uint32_t)0x00000000) /*!< UARTEN :Disable. */
#define FUARTxCR_CTSEN_ENABLE ((uint32_t)0x00008000) /*!< CTSEN :Available. */
#define FUARTxCR_RTSEN_ENABLE ((uint32_t)0x00004000) /*!< RTSEN :Available. */
#define FUARTxCR_RXE_ENABLE ((uint32_t)0x00000200) /*!< RXE :Enable. */
#define FUARTxCR_TXE_ENABLE ((uint32_t)0x00000100) /*!< TXE :Enable. */
#define FUARTxCR_UARTEN_ENABLE ((uint32_t)0x00000001) /*!< UARTEN :Enable. */
/**
* @}
*/ /* End of group FUARTxRSR */
/**
* @defgroup FUARTxRSR FUARTxRSR Register
* @brief FUARTxRSR Register Definition.
* @{
*/
#define FUARTxRSR_OE_MASK ((uint32_t)0x00000008) /*!< OE :Mask */
#define FUARTxRSR_BE_MASK ((uint32_t)0x00000004) /*!< BE :Mask */
#define FUARTxRSR_PE_MASK ((uint32_t)0x00000002) /*!< PE :Mask */
#define FUARTxRSR_FE_MASK ((uint32_t)0x00000001) /*!< FE :Mask */
#define FUARTxRSR_OE_ERR ((uint32_t)0x00000008) /*!< OE :Error */
#define FUARTxRSR_BE_ERR ((uint32_t)0x00000004) /*!< BE :Error */
#define FUARTxRSR_PE_ERR ((uint32_t)0x00000002) /*!< PE :Error */
#define FUARTxRSR_FE_ERR ((uint32_t)0x00000001) /*!< FE :Error */
/**
* @}
*/ /* End of group FUARTxRSR */
/**
* @defgroup FUARTxECR FUARTxECR Register
* @brief FUARTxECR Register Definition.
* @{
*/
/* ECR */
#define FUARTxECR_OE_MASK ((uint32_t)0x00000008) /*!< OE :Mask */
#define FUARTxECR_BE_MASK ((uint32_t)0x00000004) /*!< BE :Mask */
#define FUARTxECR_PE_MASK ((uint32_t)0x00000002) /*!< PE :Mask */
#define FUARTxECR_FE_MASK ((uint32_t)0x00000001) /*!< FE :Mask */
#define FUARTxECR_OE_CLR ((uint32_t)0x00000008) /*!< OE :Clear */
#define FUARTxECR_BE_CLR ((uint32_t)0x00000004) /*!< BE :Clear */
#define FUARTxECR_PE_CLR ((uint32_t)0x00000002) /*!< PE :Clear */
#define FUARTxECR_FE_CLR ((uint32_t)0x00000001) /*!< FE :Clear */
/**
* @}
*/ /* End of group FUARTxECR */
/**
* @defgroup FUARTxLCR_H FUARTxRSR Register
* @brief FUARTxLCR_H Register Definition.
* @{
*/
#define FUARTxLCR_H_BRK_MASK ((uint32_t)0x00000001) /*!< BRK :Mask */
#define FUARTxLCR_H_BRK_SEND ((uint32_t)0x00000001) /*!< BRK :Send */
#define FUARTxLCR_H_BRK_STOP ((uint32_t)0x00000000) /*!< BRK :Stop */
/**
* @}
*/ /* End of group FUARTxLCR_H */
/**
* @defgroup FUARTxRIS FUARTxRIS Register
* @brief FUARTxRIS Register Definition.
* @{
*/
#define FUARTxRIS_OERIS_MASK ((uint32_t)0x00000400) /*!< OERIS :Mask */
#define FUARTxRIS_BERIS_MASK ((uint32_t)0x00000200) /*!< BERIS :Mask */
#define FUARTxRIS_PERIS_MASK ((uint32_t)0x00000100) /*!< PRRIS :Mask */
#define FUARTxRIS_FERIS_MASK ((uint32_t)0x00000080) /*!< FERIS :Mask */
#define FUARTxRIS_RTRIS_MASK ((uint32_t)0x00000040) /*!< RTRIS :Mask */
#define FUARTxRIS_TXRIS_MASK ((uint32_t)0x00000020) /*!< TXRIS :Mask */
#define FUARTxRIS_RXRIS_MASK ((uint32_t)0x00000010) /*!< RXRIS :Mask */
#define FUARTxRIS_OERIS_REQ ((uint32_t)0x00000400) /*!< OERIS :Request */
#define FUARTxRIS_BERIS_REQ ((uint32_t)0x00000200) /*!< BERIS :Request */
#define FUARTxRIS_PERIS_REQ ((uint32_t)0x00000100) /*!< PRRIS :Request */
#define FUARTxRIS_FERIS_REQ ((uint32_t)0x00000080) /*!< FERIS :Request */
#define FUARTxRIS_RTRIS_REQ ((uint32_t)0x00000040) /*!< RTRIS :Request */
#define FUARTxRIS_TXRIS_REQ ((uint32_t)0x00000020) /*!< TXRIS :Request */
#define FUARTxRIS_RXRIS_REQ ((uint32_t)0x00000010) /*!< RXRIS :Request */
/**
* @}
*/ /* End of group FUARTxRIS */
/**
* @defgroup FUARTxMIS FUARTxMIS Register
* @brief FUARTxMIS Register Definition.
* @{
*/
#define FUARTxMIS_OEMIS_MASK ((uint32_t)0x00000400) /*!< OEMIS :Mask */
#define FUARTxMIS_BEMIS_MASK ((uint32_t)0x00000200) /*!< BEMIS :Mask */
#define FUARTxMIS_PEMIS_MASK ((uint32_t)0x00000100) /*!< PRMIS :Mask */
#define FUARTxMIS_FEMIS_MASK ((uint32_t)0x00000080) /*!< FEMIS :Mask */
#define FUARTxMIS_RTMIS_MASK ((uint32_t)0x00000040) /*!< RTMIS :Mask */
#define FUARTxMIS_TXMIS_MASK ((uint32_t)0x00000020) /*!< TXMIS :Mask */
#define FUARTxMIS_RXMIS_MASK ((uint32_t)0x00000010) /*!< RXMIS :Mask */
#define FUARTxMIS_OEMIS_REQ ((uint32_t)0x00000400) /*!< OEMIS :Request */
#define FUARTxMIS_BEMIS_REQ ((uint32_t)0x00000200) /*!< BEMIS :Request */
#define FUARTxMIS_PEMIS_REQ ((uint32_t)0x00000100) /*!< PRMIS :Request */
#define FUARTxMIS_FEMIS_REQ ((uint32_t)0x00000080) /*!< FEMIS :Request */
#define FUARTxMIS_RTMIS_REQ ((uint32_t)0x00000040) /*!< RTMIS :Request */
#define FUARTxMIS_TXMIS_REQ ((uint32_t)0x00000020) /*!< TXMIS :Request */
#define FUARTxMIS_RXMIS_REQ ((uint32_t)0x00000010) /*!< RXMIS :Request */
/**
* @}
*/ /* End of group FUARTxMIS */
/**
* @defgroup FUARTxICR FUARTxICR Register
* @brief FUARTxICR Register Definition.
* @{
*/
#define FUARTxICR_OEIC_MASK ((uint32_t)0x00000400) /*!< OEIC :Mask */
#define FUARTxICR_BEIC_MASK ((uint32_t)0x00000200) /*!< BEIC :Mask */
#define FUARTxICR_PEIC_MASK ((uint32_t)0x00000100) /*!< PRIC :Mask */
#define FUARTxICR_FEIC_MASK ((uint32_t)0x00000080) /*!< FEIC :Mask */
#define FUARTxICR_RTIC_MASK ((uint32_t)0x00000040) /*!< RTIC :Mask */
#define FUARTxICR_TXIC_MASK ((uint32_t)0x00000020) /*!< TXIC :Mask */
#define FUARTxICR_RXIC_MASK ((uint32_t)0x00000010) /*!< RXIC :Mask */
#define FUARTxICR_OEIC_CLR ((uint32_t)0x00000400) /*!< OEIC :Request */
#define FUARTxICR_BEIC_CLR ((uint32_t)0x00000200) /*!< BEIC :Request */
#define FUARTxICR_PEIC_CLR ((uint32_t)0x00000100) /*!< PRIC :Request */
#define FUARTxICR_FEIC_CLR ((uint32_t)0x00000080) /*!< FEIC :Request */
#define FUARTxICR_RTIC_CLR ((uint32_t)0x00000040) /*!< RTIC :Request */
#define FUARTxICR_TXIC_CLR ((uint32_t)0x00000020) /*!< TXIC :Request */
#define FUARTxICR_RXIC_CLR ((uint32_t)0x00000010) /*!< RXIC :Request */
/**
* @}
*/ /* End of group FUARTxICR */
/**
* @defgroup FUARTxDMACR FUARTxDMACR Register
* @brief FUARTxDMACR Register Definition.
* @{
*/
#define FUARTxDMACR_RXDMAE_MASK ((uint32_t)0x00000001) /*!< RXDMAE :Mask */
#define FUARTxDMACR_TXDMAE_MASK ((uint32_t)0x00000002) /*!< TXDMAE :Mask */
#define FUARTxDMACR_RXDMAE_ENABLE ((uint32_t)0x00000001) /*!< RXDMAE :Enable */
#define FUARTxDMACR_TXDMAE_ENABLE ((uint32_t)0x00000002) /*!< TXDMAE :Enable */
#define FUARTxDMACR_RXDMAE_DISABLE ((uint32_t)0x00000000) /*!< RXDMAE :Disable */
#define FUARTxDMACR_TXDMAE_DISABLE ((uint32_t)0x00000000) /*!< TXDMAE :Disable */
/**
* @}
*/ /* End of group FUARTxDMACR */
/**
* @}
*/ /* End of group FUART_Private_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup FUART_Private_define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group FUART_Private_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup FUART_Private_typedef
* @{
*/
/* no define */
/**
* @}
*/ /* End of group FUART_Private_typedef */
/*------------------------------------------------------------------------------*/
/* Inline Functions */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup FUART_Private_functions
* @{
*/
__STATIC_INLINE void disable_FUARTxCR_TXE(TSB_FURT_TypeDef *p_instance);
__STATIC_INLINE void enable_FUARTxCR_TXE(TSB_FURT_TypeDef *p_instance);
__STATIC_INLINE void disable_FUARTxCR_RXE(TSB_FURT_TypeDef *p_instance);
__STATIC_INLINE void enable_FUARTxCR_RXE(TSB_FURT_TypeDef *p_instance);
/*--------------------------------------------------*/
/**
* @brief Disable FUARTxCR TXE.
* @param p_instance: Instance address.
* @retval -
* @note Bitband Access
*/
/*--------------------------------------------------*/
__STATIC_INLINE void disable_FUARTxCR_TXE(TSB_FURT_TypeDef *p_instance)
{
#ifdef DEBUG
if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
{
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->CR,8))) = 0;
}
#else
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->CR,8))) = 0;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Enable FUARTxCR TXE.
* @param p_instance: Instance address.
* @retval -
* @note Bitband Access
*/
/*--------------------------------------------------*/
__STATIC_INLINE void enable_FUARTxCR_TXE(TSB_FURT_TypeDef *p_instance)
{
#ifdef DEBUG
if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
{
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->CR,8))) = 1;
}
#else
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->CR,8))) = 1;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Disable FUARTxCR RXE.
* @param p_instance: Instance address.
* @retval -
* @note Bitband Access
*/
/*--------------------------------------------------*/
__STATIC_INLINE void disable_FUARTxCR_RXE(TSB_FURT_TypeDef *p_instance)
{
#ifdef DEBUG
if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
{
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->CR,9))) = 0;
}
#else
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->CR,9))) = 0;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Enable FUARTxCR RXE.
* @param p_instance: Instance address.
* @retval -
* @note Bitband Access
*/
/*--------------------------------------------------*/
__STATIC_INLINE void enable_FUARTxCR_RXE(TSB_FURT_TypeDef *p_instance)
{
#ifdef DEBUG
if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
{
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->CR,9))) = 1;
}
#else
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->CR,9))) = 1;
#endif
}
/**
* @}
*/ /* End of group FUART_Private_functions */
/**
* @}
*/ /* End of group FUART */
/**
* @}
*/ /* End of group Periph_Driver */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __UART_EX_H */

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/**
*******************************************************************************
* @file txz_hal.h
* @brief This file provides all the functions prototypes for driver common part.
* @version V1.0.0.0
* $Date:: 2017-08-09 11:01:04 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __HAL_H
#define __HAL_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
/**
* @addtogroup Periph_Driver
* @{
*/
/**
* @defgroup HAL HAL
* @brief HAL Driver.
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Function */
/*------------------------------------------------------------------------------*/
/**
* @defgroup HAL_Exported_macro HAL Exported Macro
* @{
*/
/* no define */
/**
* @}
*/ /* End of group HAL_Exported_macro */
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup HAL_Exported_define HAL Exported Define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group HAL_Exported_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup HAL_Exported_define HAL Exported Define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group HAL_Exported_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup HAL_Exported_typedef HAL Exported Typedef
* @{
*/
/* no define */
/**
* @}
*/ /* End of group HAL_Exported_typedef */
/*------------------------------------------------------------------------------*/
/* Functions */
/*------------------------------------------------------------------------------*/
/**
* @defgroup HAL_Exported_functions HAL Exported Functions
* @{
*/
void hal_inc_tick(void);
uint32_t hal_get_tick(void);
/**
* @}
*/ /* End of group HAL_Exported_functions */
/**
* @}
*/ /* End of group HAL */
/**
* @}
*/ /* End of group Periph_Driver */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __HAL_H */

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/**
*******************************************************************************
* @file txz_i2c.h
* @brief This file provides all the functions prototypes for I2C Class.
* @version V1.0.0.4
* $Date:: 2016-11-24 00:00:00 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __I2C_H
#define __I2C_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
/**
* @addtogroup Example
* @{
*/
/**
* @addtogroup UTILITIES
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Function */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Private_macro
* @{
*/
/* no define */
/**
* @}
*/ /* End of group UTILITIES_Private_macro */
/*------------------------------------------------------------------------------*/
/* Configuration */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Private_define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group UTILITIES_Private_define */
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Private_define
* @{
*/
#ifdef DEBUG
/**
* @name I2C_NULL Pointer
* @brief NULL Pointer.
* @{
*/
#define I2C_NULL ((void *)0)
/**
* @}
*/ /* End of name I2C_NULL Pointer */
#endif
/**
* @name I2CxST Macro Definition.
* @brief I2CxST Register Macro Definition.
* @{
*/
#define I2CxST_NACK ((uint32_t)0x00000008) /*!< NACK Interrupt Status. */
#define I2CxST_I2CBF ((uint32_t)0x00000004) /*!< I2CBF Interrupt Status. */
#define I2CxST_I2CAL ((uint32_t)0x00000002) /*!< I2CAL Interrupt Status. */
#define I2CxST_I2C ((uint32_t)0x00000001) /*!< I2C Interrupt Status. */
#define I2CxST_CLEAR ((uint32_t)0x0000000F) /*!< All Bits Clear. */
/**
* @}
*/ /* End of name I2CxST Macro Definition */
/**
* @name I2CxCR1 Macro Definition.
* @brief I2CxCR1 Register Macro Definition.
* @{
*/
#define I2CxCR1_ACK ((uint32_t)0x00000010) /*!< ACK */
#define I2CxCR1_NOACK ((uint32_t)0x00000008) /*!< NOACK */
#define I2CxCR1_BC ((uint32_t)0x000000E0) /*!< BC */
/**
* @}
*/ /* End of name I2CxCR1 Macro Definition */
/**
* @name I2CxDBR Macro Definition.
* @brief I2CxDBR Register Macro Definition.
* @{
*/
#define I2CxDBR_DB_MASK ((uint32_t)0x000000FF) /* !< DB 7-0 bits mask. */
/**
* @}
*/ /* End of name I2CxDBR Macro Definition */
/**
* @name I2CxCR2 Macro Definition.
* @brief I2CxCR2 Register Macro Definition.
* @{
*/
#define I2CxCR2_PIN_CLEAR ((uint32_t)0x00000010) /*!< PIN=1 */
#define I2CxCR2_I2CM_DISABLE ((uint32_t)0x00000000) /*!< I2CM=0 */
#define I2CxCR2_I2CM_ENABLE ((uint32_t)0x00000008) /*!< I2CM=1 */
#define I2CxCR2_SWRES_10 ((uint32_t)0x00000002) /*!< SWRES=10 */
#define I2CxCR2_SWRES_01 ((uint32_t)0x00000001) /*!< SWRES=01 */
#define I2CxCR2_START_CONDITION ((uint32_t)0x000000F8) /*!< MST=1,TRX=1,BB=1,PIN=1,I2CM=1 */
#define I2CxCR2_STOP_CONDITION ((uint32_t)0x000000D8) /*!< MST=1,TRX=1,BB=0,PIN=1,I2CM=1 */
#define I2CxCR2_INIT ((uint32_t)0x00000008) /*!< MST=0,TRX=0,BB=0,PIN=0,I2CM=1,SWRES=00 */
/**
* @}
*/ /* End of name I2CxCR2 Macro Definition */
/**
* @name I2CxSR Macro Definition.
* @brief I2CxSR Register Macro Definition.
* @{
*/
#define I2CxSR_MST ((uint32_t)0x00000080) /*!< MST */
#define I2CxSR_TRX ((uint32_t)0x00000040) /*!< TRX */
#define I2CxSR_BB ((uint32_t)0x00000020) /*!< BB */
#define I2CxSR_PIN ((uint32_t)0x00000010) /*!< PIN */
#define I2CxSR_AL ((uint32_t)0x00000008) /*!< AL */
#define I2CxSR_AAS ((uint32_t)0x00000004) /*!< AAS */
#define I2CxSR_AD0 ((uint32_t)0x00000002) /*!< AD0 */
#define I2CxSR_LRB ((uint32_t)0x00000001) /*!< LRB */
/**
* @}
*/ /* End of name I2CxSR Macro Definition */
/**
* @name I2CxPRS Macro Definition.
* @brief I2CxPRS Register Macro Definition.
* @{
*/
#define I2CxPRS_PRCK ((uint32_t)0x0000001F) /*!< PRCK */
/**
* @}
*/ /* End of name I2CxPRS Macro Definition */
/**
* @name I2CxIE Macro Definition.
* @brief I2CxIE Register Macro Definition.
* @{
*/
#define I2CxIE_SELPINCD ((uint32_t)0x00000040) /*!< SELPINCD */
#define I2CxIE_DMARI2CTX ((uint32_t)0x00000020) /*!< DMARI2CTX */
#define I2CxIE_DMARI2CRX ((uint32_t)0x00000010) /*!< DMARI2CRX */
#define I2CxIE_I2C ((uint32_t)0x00000001) /*!< INTI2C */
#define I2CxIE_CLEAR ((uint32_t)0x00000000) /*!< All Clear Setting */
/**
* @}
*/ /* End of name I2CxIE Macro Definition */
/**
* @name I2CxOP Macro Definition.
* @brief I2CxOP Register Macro Definition.
* @{
*/
#define I2CxOP_DISAL ((uint32_t)0x00000080) /*!< DISAL */
#define I2CxOP_SA2ST ((uint32_t)0x00000040) /*!< SA2ST */
#define I2CxOP_SAST ((uint32_t)0x00000020) /*!< SAST */
#define I2CxOP_NFSEL ((uint32_t)0x00000010) /*!< NFSEL */
#define I2CxOP_RSTA ((uint32_t)0x00000008) /*!< RSTA */
#define I2CxOP_GCDI ((uint32_t)0x00000004) /*!< GDDI */
#define I2CxOP_SREN ((uint32_t)0x00000002) /*!< SREN */
#define I2CxOP_MFACK ((uint32_t)0x00000001) /*!< MFACK */
#ifndef I2C_MULTI_MASTER
#define I2CxOP_INIT ((uint32_t)0x00000084) /*!< Initial Settings. */
#else
#define I2CxOP_INIT ((uint32_t)0x00000004) /*!< Initial Settings. */
#endif
#define I2CxOP_SLAVE_INIT ((uint32_t)0x00000084) /*!< Slave Initial Settings. */
/**
* @}
*/ /* End of name I2CxOP Macro Definition */
/**
* @name I2CxAR Macro Definition.
* @brief I2CxAR Register Macro Definition.
* @{
*/
#define I2CxAR_ALS ((uint32_t)0x00000001) /*!< ALS. */
#define I2CxAR_INIT ((uint32_t)0x00000000) /*!< Initial Settings. */
#define I2CxAR2_INIT ((uint32_t)0x00000000) /*!< Initial Settings. */
/**
* @}
*/ /* End of name I2CxAR Macro Definition */
/**
* @name I2CxPM Macro Definition.
* @brief I2CxPM Register Macro Definition.
* @{
*/
#define I2CxPM_SDA_SCL ((uint32_t)0x00000003) /* SDA and SCL level. */
/**
* @}
*/ /* End of name I2CxPM Macro Definition */
/**
* @name I2CxWUPCR_INT Macro Definition.
* @brief I2CxWUPCR_INT Register Macro Definition.
* @{
*/
#define I2CxWUPCR_INT_RELESE ((uint32_t)0x00000001) /* Interrupt Release. */
#define I2CxWUPCR_INT_HOLD ((uint32_t)0x00000000) /* Interrupt setting keep it. */
/**
* @}
*/ /* End of name I2CxWUPCR_INT Macro Definition */
/**
* @name I2CxWUPCR_RST Macro Definition.
* @brief I2CxWUPCR_RST Register Macro Definition.
* @{
*/
#define I2CxWUPCR_RST_RESET ((uint32_t)0x00000010) /* I2C BUS Reset. */
#define I2CxWUPCR_RST_RELEASE ((uint32_t)0x00000000) /* I2C BUS Reset Release. */
/**
* @}
*/ /* End of name I2CxWUPCR_RST Macro Definition */
/**
* @name I2CxWUPCR_ACK Macro Definition.
* @brief I2CxWUPCR_ACK Register Macro Definition.
* @{
*/
#define I2CxWUPCR_ACK ((uint32_t)0x00000020) /* ACK Output. Output "0" */
#define I2CxWUPCR_NACK ((uint32_t)0x00000000) /* ACL No Output. Output "1" NACK Output */
/**
* @}
*/ /* End of name I2CxWUPCR_RST Macro Definition */
/**
* @}
*/ /* End of group UTILITIES_Private_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Private_define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group UTILITIES_Private_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Private_typedef
* @{
*/
/*----------------------------------*/
/**
* @brief Clock setting structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint32_t sck; /*!< Select internal SCL output clock frequency. */
uint32_t prsck; /*!< Prescaler clock frequency for generating the Serial clock. */
} I2C_clock_setting_t;
/*----------------------------------*/
/**
* @brief Wakeup Control setting structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint32_t sgcdi; /*!< Select general call detect ON/OFF. */
uint32_t ack; /*!< Select ACK output. */
uint32_t reset; /*!< I2C BUS Rest. */
uint32_t intend; /*!< Interrupt release. */
} I2CS_wup_setting_t;
/*----------------------------------*/
/**
* @brief Initial setting structure definition.
*/
/*----------------------------------*/
typedef struct
{
I2C_clock_setting_t clock; /*!< Serial clock setting. */
} I2C_initial_setting_t;
/*----------------------------------*/
/**
* @brief Initial setting structure definition.
*/
/*----------------------------------*/
typedef struct
{
I2CS_wup_setting_t wup; /*!< Wakeup Control setting. */
} I2CS_initial_setting_t;
/*----------------------------------*/
/**
* @brief I2C handle structure definition.
*/
/*----------------------------------*/
typedef struct
{
TSB_I2C_TypeDef *p_instance; /*!< Registers base address. */
I2C_initial_setting_t init; /*!< Initial setting. */
} I2C_t;
#if defined(I2CSxWUP_EN)
/*----------------------------------*/
/**
* @brief I2CS handle structure definition.
*/
/*----------------------------------*/
typedef struct
{
TSB_I2CS_TypeDef *p_instance; /*!< Registers base address. */
I2CS_initial_setting_t init; /*!< Initial setting. */
} I2CS_t;
#endif
/**
* @}
*/ /* End of group UTILITIES_Private_typedef */
/*------------------------------------------------------------------------------*/
/* Inline Functions */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Private_functions
* @{
*/
__STATIC_INLINE void I2C_reset(I2C_t *p_obj);
__STATIC_INLINE int32_t I2C_port_high(I2C_t *p_obj);
__STATIC_INLINE void I2C_stop_condition(I2C_t *p_obj);
__STATIC_INLINE uint32_t I2C_read_data(I2C_t *p_obj);
__STATIC_INLINE void I2C_write_data(I2C_t *p_obj, uint32_t data);
__STATIC_INLINE int32_t I2C_restart(I2C_t *p_obj);
__STATIC_INLINE void I2C_set_ack(I2C_t *p_obj, int32_t nack);
__STATIC_INLINE int32_t I2C_get_ack(I2C_t *p_obj);
__STATIC_INLINE int32_t I2C_status_busy(I2C_t *p_obj);
__STATIC_INLINE int32_t I2C_master(I2C_t *p_obj);
__STATIC_INLINE int32_t I2C_transmitter(I2C_t *p_obj);
__STATIC_INLINE int32_t I2C_int_status(I2C_t *p_obj);
__STATIC_INLINE void I2C_clear_int_status(I2C_t *p_obj);
__STATIC_INLINE void I2C_enable_interrupt(I2C_t *p_obj);
__STATIC_INLINE void I2C_enable_interrupt_dma(I2C_t *p_obj, int32_t tx);
__STATIC_INLINE void I2C_disable_interrupt(I2C_t *p_obj);
__STATIC_INLINE void I2C_set_address(I2C_t *p_obj, uint32_t addr);
__STATIC_INLINE int32_t I2C_slave_detected(I2C_t *p_obj);
/*--------------------------------------------------*/
/**
* @brief I2C software reset.
* @param p_obj :I2C object.
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE void I2C_reset(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
p_obj->p_instance->CR2 = I2CxCR2_SWRES_10;
p_obj->p_instance->CR2 = I2CxCR2_SWRES_01;
}
#else
p_obj->p_instance->CR2 = I2CxCR2_SWRES_10;
p_obj->p_instance->CR2 = I2CxCR2_SWRES_01;
#endif
}
/*--------------------------------------------------*/
/**
* @brief I2C bus port high
* @param p_obj :I2C object.
* @retval true :SDA and SCL Port High.
* @retval false :Bus Error.
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE int32_t I2C_port_high(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
return (((p_obj->p_instance->PM & I2CxPM_SDA_SCL) == I2CxPM_SDA_SCL));
}
return (0);
#else
return (((p_obj->p_instance->PM & I2CxPM_SDA_SCL) == I2CxPM_SDA_SCL));
#endif
}
/*--------------------------------------------------*/
/**
* @brief Generate stop condition.
* @param p_obj :I2C object.
* @retval -
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE void I2C_stop_condition(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
p_obj->p_instance->CR2 = I2CxCR2_STOP_CONDITION;
}
#else
p_obj->p_instance->CR2 = I2CxCR2_STOP_CONDITION;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Read from Data buffer
* @param p_obj :I2C object.
* @retval result :Read data.
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE uint32_t I2C_read_data(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
return (p_obj->p_instance->DBR & I2CxDBR_DB_MASK);
}
return (0);
#else
return (p_obj->p_instance->DBR & I2CxDBR_DB_MASK);
#endif
}
/*--------------------------------------------------*/
/**
* @brief Write to Data buffer.
* @param p_obj :I2C object.
* @param data :Write data.
* @retval -
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE void I2C_write_data(I2C_t *p_obj, uint32_t data)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
p_obj->p_instance->DBR = (data & I2CxDBR_DB_MASK);
}
#else
p_obj->p_instance->DBR = (data & I2CxDBR_DB_MASK);
#endif
}
/*--------------------------------------------------*/
/**
* @brief Return restart condition
* @param p_obj :I2C object.
* @retval true :Restart Detected.
* @retval false :Restart Non-Detected.
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE int32_t I2C_restart(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
__IO uint32_t opreg = p_obj->p_instance->OP;
p_obj->p_instance->OP &= ~I2CxOP_RSTA;
return ((opreg & I2CxOP_RSTA) == I2CxOP_RSTA);
}
return (0);
#else
__IO uint32_t opreg = p_obj->p_instance->OP;
p_obj->p_instance->OP &= ~I2CxOP_RSTA;
return ((opreg & I2CxOP_RSTA) == I2CxOP_RSTA);
#endif
}
/*--------------------------------------------------*/
/**
* @brief Set Ack condition
* @param p_obj :I2C object.
* @param nack :1 NACK, 0 ACK.
* @retval -
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE void I2C_set_ack(I2C_t *p_obj, int32_t nack)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
if (nack)
{
p_obj->p_instance->OP |= I2CxOP_MFACK;
}
else
{
p_obj->p_instance->OP &= ~I2CxOP_MFACK;
}
}
#else
if (nack)
{
p_obj->p_instance->OP |= I2CxOP_MFACK;
}
else
{
p_obj->p_instance->OP &= ~I2CxOP_MFACK;
}
#endif
}
/*--------------------------------------------------*/
/**
* @brief Return received Ack condition
* @param p_obj :I2C object.
* @retval true :NACK Received.
* @retval false :ACK Received.
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE int32_t I2C_get_ack(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
return ((p_obj->p_instance->SR & I2CxSR_LRB) == I2CxSR_LRB);
}
return (0);
#else
return ((p_obj->p_instance->SR & I2CxSR_LRB) == I2CxSR_LRB);
#endif
}
/*--------------------------------------------------*/
/**
* @brief Return Busy condition
* @param p_obj :I2C object.
* @retval true :I2C bus busy.
* @retval false :I2C bus free.
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE int32_t I2C_status_busy(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
return ((p_obj->p_instance->SR & I2CxSR_BB) == I2CxSR_BB);
}
return (0);
#else
return ((p_obj->p_instance->SR & I2CxSR_BB) == I2CxSR_BB);
#endif
}
/*--------------------------------------------------*/
/**
* @brief Return The Master status
* @param p_obj :I2C object.
* @retval true :Master mode.
* @retval false :Slave mode.
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE int32_t I2C_master(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
return ((p_obj->p_instance->SR & I2CxSR_MST) == I2CxSR_MST);
}
return (0);
#else
return ((p_obj->p_instance->SR & I2CxSR_MST) == I2CxSR_MST);
#endif
}
/*--------------------------------------------------*/
/**
* @brief Return The Transmitter
* @param p_obj :I2C object.
* @retval true :Transmitter.
* @retval false :Receiver.
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE int32_t I2C_transmitter(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
return ((p_obj->p_instance->SR & I2CxSR_TRX) == I2CxSR_TRX);
}
return (0);
#else
return ((p_obj->p_instance->SR & I2CxSR_TRX) == I2CxSR_TRX);
#endif
}
/*--------------------------------------------------*/
/**
* @brief Interrupt Status
* @param p_obj :I2C object.
* @retval true :Interrupt Occurred.
* @retval false :No Interrupt Occurred.
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE int32_t I2C_int_status(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
return ((p_obj->p_instance->ST & I2CxST_I2C) == I2CxST_I2C);
}
return (0);
#else
return ((p_obj->p_instance->ST & I2CxST_I2C) == I2CxST_I2C);
#endif
}
/*--------------------------------------------------*/
/**
* @brief Interrupt Status Clear
* @param p_obj :I2C object.
* @retval -
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE void I2C_clear_int_status(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
p_obj->p_instance->ST = I2CxST_CLEAR;
}
#else
p_obj->p_instance->ST = I2CxST_CLEAR;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Enable Interrupt setting.
* @param p_obj :I2C object.
* @retval -
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE void I2C_enable_interrupt(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
p_obj->p_instance->IE = I2CxIE_I2C;
}
#else
p_obj->p_instance->IE = I2CxIE_I2C;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Enable Interrupt setting.
* @param p_obj :I2C object.
* @param tx :Direction of transfer(1=tx 0=rx).
* @retval -
* @note For DMA transfer.
*/
/*--------------------------------------------------*/
__STATIC_INLINE void I2C_enable_interrupt_dma(I2C_t *p_obj, int32_t tx)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
if (tx)
{
p_obj->p_instance->IE = (I2CxIE_SELPINCD | I2CxIE_DMARI2CTX);
}
else
{
p_obj->p_instance->IE = (I2CxIE_SELPINCD | I2CxIE_DMARI2CRX);
}
}
#else
if (tx)
{
p_obj->p_instance->IE = (I2CxIE_SELPINCD | I2CxIE_DMARI2CTX);
}
else
{
p_obj->p_instance->IE = (I2CxIE_SELPINCD | I2CxIE_DMARI2CRX);
}
#endif
}
/*--------------------------------------------------*/
/**
* @brief Disable Interrupt setting.
* @param p_obj :I2C object.
* @retval -
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE void I2C_disable_interrupt(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
p_obj->p_instance->IE = I2CxIE_CLEAR;
}
#else
p_obj->p_instance->IE = I2CxIE_CLEAR;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Set slave address.
* @param p_obj :I2C object.
* @param addr :slave address.
* @retval -
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE void I2C_set_address(I2C_t *p_obj, uint32_t addr)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
p_obj->p_instance->AR = (addr & ~I2CxAR_ALS);
p_obj->p_instance->AR2 = I2CxAR2_INIT;
}
#else
p_obj->p_instance->AR = (addr & ~I2CxAR_ALS);
p_obj->p_instance->AR2 = I2CxAR2_INIT;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Detecting Slave Address
* @param p_obj :I2C object.
* @retval -
* @note -
*/
/*--------------------------------------------------*/
__STATIC_INLINE int32_t I2C_slave_detected(I2C_t *p_obj)
{
#ifdef DEBUG
if ((p_obj != I2C_NULL) && (p_obj->p_instance != I2C_NULL))
{
return (((p_obj->p_instance->SR & I2CxSR_AAS) == I2CxSR_AAS)
&& ((p_obj->p_instance->OP & I2CxOP_SAST) == I2CxOP_SAST));
}
return (0);
#else
return (((p_obj->p_instance->SR & I2CxSR_AAS) == I2CxSR_AAS)
&& ((p_obj->p_instance->OP & I2CxOP_SAST) == I2CxOP_SAST));
#endif
}
/**
* @}
*/ /* End of group UTILITIES_Private_functions */
/*------------------------------------------------------------------------------*/
/* Functions */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Private_functions
* @{
*/
void I2C_init(I2C_t *p_obj);
void I2C_start_condition(I2C_t *p_obj, uint32_t data);
uint32_t I2C_get_clock_setting(I2C_t *p_obj, uint32_t frequency, uint32_t fsys, I2C_clock_setting_t *p_setting);
void I2C_slave_init(I2C_t *p_obj);
#if defined(I2CSxWUP_EN)
void I2CS_init(I2CS_t *p_obj);
void I2CS_Primary_slave_adr_set(I2CS_t *p_obj, uint32_t adr);
void I2CS_Secondary_slave_adr_set(I2CS_t *p_obj, uint32_t adr);
#endif
/**
* @}
*/ /* End of group UTILITIES_Private_functions */
/**
* @}
*/ /* End of group UTILITIES */
/**
* @}
*/ /* End of group Example */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __I2C_H */

334
targets/TARGET_TOSHIBA/TARGET_TMPM4G9/Periph_Driver/inc/txz_i2c_api.h Normal file
View File

@@ -0,0 +1,334 @@
/**
*******************************************************************************
* @file bsp_i2c.h
* @brief This file provides all the functions prototypes for I2C Driver.
* @version V1.0.0.2
* $Date:: 2017-10-03 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __BSP_I2C_H
#define __BSP_I2C_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_i2c.h"
/**
* @addtogroup Example
* @{
*/
/**
* @addtogroup UTILITIES
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Function */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Exported_macro
* @{
*/
/* no define */
/**
* @}
*/ /* End of group UTILITIES_Exported_macro */
/*------------------------------------------------------------------------------*/
/* Configuration */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Exported_define
* @{
*/
/**
* @defgroup I2C_NullPointer Null Pointer
* @brief I2C NULL Pointer.
* @{
*/
#define I2C_NULL ((void *)0)
/**
* @}
*/ /* End of group I2C_NullPointer */
/**
* @}
*/ /* End of group UTILITIES_Exported_define */
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Exported_define
* @{
*/
/**
* @defgroup I2C_ACK I2C ACK Macros
* @brief I2C Type of Acknowledge.
* @{
*/
#define I2C_NACK (0) /*!< NACK Received. */
#define I2C_ACK (1) /*!< ACK Received. */
/**
* @}
*/ /* End of group I2C_ACK */
/**
* @defgroup I2C_ERROR I2C ERROR Macros
* @brief I2C Error definitions.
* @{
*/
#define I2C_ERROR_NO_ERROR (0) /*!< No Error. */
#if 0
#define I2C_ERROR_NO_SLAVE (-1) /*!< No Slave Error. */
#define I2C_ERROR_BUS_BUSY (-2) /*!< Bus Busy Error.(now, not support) */
#endif
#define I2C_ERROR_PARAM (-3) /*!< Parameter Error. */
#define I2C_ERROR_OTHERS (-4) /*!< Others Error. */
#define I2C_ERROR_ARBITRATION (-5) /*!< Arbitration Error. */
/**
* @}
*/ /* End of group I2C_ERROR */
/**
* @defgroup I2C_Events I2C Events Macros
* @brief I2C Asynch Events.
* @{
*/
#define I2C_EVENT_ERROR (1 << 1) /*!< Error. */
#define I2C_EVENT_ERROR_NO_SLAVE (1 << 2) /*!< No Slave. */
#define I2C_EVENT_TRANSFER_COMPLETE (1 << 3) /*!< Transfer Complete. */
#define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4) /*!< End of Transfer. */
#define I2C_EVENT_ALL (I2C_EVENT_ERROR | I2C_EVENT_TRANSFER_COMPLETE | I2C_EVENT_ERROR_NO_SLAVE | I2C_EVENT_TRANSFER_EARLY_NACK)
/**
* @}
*/ /* End of group I2C_Events */
/**
* @defgroup I2C_SlaveReceive I2C Slave Receive Return Macros
* @brief I2C Received Contents of Slave.
* @{
*/
#define I2C_NO_DATA (0) /*!< the slave has not been addressed. */
#define I2C_READ_ADDRESSED (1) /*!< the master has requested a read from this slave. */
#define I2C_WRITE_GENERAL (2) /*!< the master is writing to all slave.(now, not support) */
#define I2C_WRITE_ADDRESSED (3) /*!< the master is writing to this slave. */
/**
* @}
*/ /* End of group I2C_SlaveReceive */
/**
* @}
*/ /* End of group UTILITIES_Exported_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Exported_define
* @{
*/
/*----------------------------------*/
/**
* @brief i2c Port Enumerated Type Definition.
*/
/*----------------------------------*/
typedef enum {
I2C_PORT_PG2 = 0, /*!< 0: PG2 I2C0 */
I2C_PORT_PG3, /*!< 1: PG3 I2C0 */
I2C_PORT_PF2, /*!< 2: PF2 I2C1 */
I2C_PORT_PF3, /*!< 3: PF3 I2C1 */
I2C_PORT_PG4, /*!< 4: PG4 I2C2 */
I2C_PORT_PG5, /*!< 5: PG5 I2C2 */
I2C_PORT_PJ6, /*!< 6: PJ6 I2C3 */
I2C_PORT_PJ7, /*!< 7: PJ7 I2C3 */
I2C_PORT_PJ2, /*!< 8: PJ2 I2C4 */
I2C_PORT_PJ3, /*!< 9: PJ3 I2C4 */}
i2c_port_t;
/*----------------------*/
/* I2C Setting */
/*----------------------*/
/* #define I2C_CHANNEL0 */
#define I2C_CHANNEL3
/* #define I2C_CHANNEL2 */
/* #define I2C_CHANNEL3 */
/* #define I2C_CHANNEL4 */
#if defined(I2C_CHANNEL0)
#define I2Cx_TEXT "I2C0"
#define I2C_CFG_PORT_SCL (I2C_PORT_PG3) /*!< SCL Port. */
#define I2C_CFG_PORT_SDA (I2C_PORT_PG2) /*!< SDA Port. */
#elif defined(I2C_CHANNEL1)
#define I2Cx_TEXT "I2C1"
#define I2C_CFG_PORT_SCL (I2C_PORT_PF3) /*!< SCL Port. */
#define I2C_CFG_PORT_SDA (I2C_PORT_PF2) /*!< SDA Port. */
#elif defined(I2C_CHANNEL2)
#define I2Cx_TEXT "I2C2"
#define I2C_CFG_PORT_SCL (I2C_PORT_PG5) /*!< SCL Port. */
#define I2C_CFG_PORT_SDA (I2C_PORT_PG4) /*!< SDA Port. */
#elif defined(I2C_CHANNEL3)
#define I2Cx_TEXT "I2C3"
#define I2C_CFG_PORT_SCL (I2C_PORT_PJ7) /*!< SCL Port. */
#define I2C_CFG_PORT_SDA (I2C_PORT_PJ6) /*!< SDA Port. */
#elif defined(I2C_CHANNEL4)
#define I2Cx_TEXT "I2C4"
#define I2C_CFG_PORT_SCL (I2C_PORT_PJ3) /*!< SCL Port. */
#define I2C_CFG_PORT_SDA (I2C_PORT_PJ2) /*!< SDA Port. */
#else
#error "target channel is non-select."
#endif
/**
* @}
*/ /* End of group UTILITIES_Exported_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Exported_typedef
* @{
*/
/*----------------------------------*/
/**
* @brief I2C internal information structure definenition.
*/
/*----------------------------------*/
typedef struct
{
uint8_t bus_free; /*!< Bus free information. */
uint8_t start; /*!< Start condition information. */
uint32_t irqn; /*!< IRQ number table pointer. */
struct
{
uint32_t address; /*!< Slave address. */
uint32_t stop; /*!< Stop control */
uint32_t event; /*!< I2C Event information. */
uint32_t state; /*!< Transfer State. */
} asynch;
} i2c_internal_info_t;
/*----------------------------------*/
/**
* @brief I2C buffer structure definenition.
*/
/*----------------------------------*/
typedef struct
{
uint8_t *p_buffer; /*!< Buffer address. */
uint32_t length; /*!< Buffer length. */
uint32_t pos; /*!< Buffer pointer. */
} i2c_buffer_t;
/*----------------------------------*/
/**
* @brief I2C handle structure definenition.
*/
/*----------------------------------*/
typedef struct
{
I2C_t i2c; /*!< I2C class structure. */
i2c_internal_info_t info; /*!< Internal Information. */
i2c_buffer_t tx_buff; /*!< Tx buffer structure. */
i2c_buffer_t rx_buff; /*!< Rx buffer structure. */
} _i2c_t;
/**
* @}
*/ /* End of group UTILITIES_Exported_typedef */
/*------------------------------------------------------------------------------*/
/* Functions */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UTILITIES_Exported_functions
* @{
*/
TXZ_Result i2c_init_t(_i2c_t *p_obj, i2c_port_t sda, i2c_port_t scl);
TXZ_Result i2c_frequency_t(_i2c_t *p_obj, int32_t hz);
void i2c_reset_t(_i2c_t *p_obj);
TXZ_Result i2c_check_bus_free_t(_i2c_t *p_obj);
TXZ_Result i2c_start_t(_i2c_t *p_obj);
TXZ_Result i2c_stop_t(_i2c_t *p_obj);
int32_t i2c_read_t(_i2c_t *p_obj, int32_t address, uint8_t *p_data, int32_t length, int32_t stop);
int32_t i2c_write_t(_i2c_t *p_obj, int32_t address, uint8_t *p_data, int32_t length, int32_t stop);
int32_t i2c_byte_read_t(_i2c_t *p_obj, int32_t last);
int32_t i2c_byte_write_t(_i2c_t *p_obj, int32_t data);
uint8_t i2c_active_t(_i2c_t *p_obj);
TXZ_Result i2c_transfer_asynch_t(_i2c_t *p_obj, uint8_t *p_tx, int32_t tx_length, uint8_t *p_rx, int32_t rx_length, int32_t address, int32_t stop);
uint32_t i2c_irq_handler_asynch_t(_i2c_t *p_obj);
void i2c_abort_asynch_t(_i2c_t *p_obj);
uint32_t set_i2c(uint8_t ch, uint32_t *p_irqn);
/* For slave */
void i2c_slave_mode_t(_i2c_t *p_obj, int32_t enable_slave);
int32_t i2c_slave_receive_t(_i2c_t *p_obj);
int32_t i2c_slave_read_t(_i2c_t *p_obj, uint8_t *p_data, int32_t length);
int32_t i2c_slave_write_t(_i2c_t *p_obj, uint8_t *p_data, int32_t length);
void i2c_slave_address_t(_i2c_t *p_obj, uint32_t address);
TXZ_Result i2c_slave_transfer_asynch_t(_i2c_t *p_obj, uint8_t *p_tx, int32_t tx_length, uint8_t *p_rx, int32_t rx_length);
uint32_t i2c_slave_irq_handler_asynch_t(_i2c_t *p_obj);
void i2c_slave_abort_asynch_t(_i2c_t *p_obj);
/**
* @}
*/ /* End of group UTILITIES_Exported_functions */
/**
* @}
*/ /* End of group UTILITIES */
/**
* @}
*/ /* End of group Example */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __BSP_I2C_H */

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/**
*******************************************************************************
* @file txz_sample_def.h
* @brief This file includes header files for sample application.
* @version V1.0.0.3
* $Date:: 2017-10-26 13:33:43 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __TXZ_SAMPLE_DEF_H
#define __TXZ_SAMPLE_DEF_H
#include "txz_driver_def.h"
#include "txz_hal.h"
#if defined(TMPM4G9)
#include "txz_cg.h"
#include "txz_gpio.h"
#else
#include "txz_cg.h"
#include "txz_gpio.h"
#include "txz_dma.h"
#endif
#include "txz_uart.h"
#include "txz_t32a.h"
#endif /* __TXZ_SAMPLE_DEF_H */

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/**
*******************************************************************************
* @file txz_uart.h
* @brief This file provides all the functions prototypes for UART driver.
* @version V1.0.0.0
* $Date:: 2017-07-21 15:39:36 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __UART_H
#define __UART_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
/**
* @addtogroup Periph_Driver
* @{
*/
/**
* @defgroup UART UART
* @brief UART Driver.
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup UART_Exported_define UART Exported Define
* @{
*/
/**
* @defgroup UART_FifoMax Max Num of FIFO
* @brief Max Num of Tx/Rx Fifo.
* @{
*/
#define UART_TX_FIFO_MAX ((uint32_t)0x00000008) /*!< TX FIFO Max. */
#define UART_RX_FIFO_MAX ((uint32_t)0x00000008) /*!< RX FIFO Max. */
/**
* @}
*/ /* End of group UART_FifoMax */
/**
* @defgroup UART_HalfClockSelect Half Clock Select
* @brief Output Terminal Select
* @{
*/
#define UART_HALF_CLOCK_UTxTXDA ((uint32_t)0x00000000) /*!< Half Clock output terminal select UTxTXDA. */
#define UART_HALF_CLOCK_UTxTXDB ((uint32_t)0x00040000) /*!< Half Clock output terminal select UTxTXDB. */
/**
* @}
*/ /* End of group UART_HalfClockSelect */
/**
* @defgroup UART_HalfClockMode Half Clock Mode
* @brief Half Clock Mode Setting.
* @{
*/
#define UART_HALF_CLOCK_MODE_1 ((uint32_t)0x00000000) /*!< Half Clock 1 terminal Mode. */
#define UART_HALF_CLOCK_MODE_2 ((uint32_t)0x00020000) /*!< Half Clock 2 terminal Mode. */
/**
* @}
*/ /* End of group UART_HalfClockMode */
/**
* @defgroup UART_HalfClockCTR Half Clock Mode Control
* @brief Half Clock Control.
* @{
*/
#define UART_HALF_CLOCK_DISABLE ((uint32_t)0x00000000) /*!< Half Clock Mode Disable. */
#define UART_HALF_CLOCK_ENABLE ((uint32_t)0x00010000) /*!< Half Clock Mode Enable. */
/**
* @}
*/ /* End of group UART_HalfClockCTR */
/**
* @defgroup UART_LoopBack Loop Back Function
* @brief Half Clock Control.
* @{
*/
#define UART_LOOPBACK_DISABLE ((uint32_t)0x00000000) /*!< Loop Back Function Disable. */
#define UART_LOOPBACK_ENABLE ((uint32_t)0x00008000) /*!< Loop Back Function Enable. */
/**
* @}
*/ /* End of group UART_LoopBack */
/**
* @defgroup UART_NoiseFilter Noise Filter
* @brief Noise Filter Setting.
* @{
*/
#define UART_NOISE_FILTER_NON ((uint32_t)0x00000000) /*!< No Filetering. */
#define UART_NOISE_FILTER_2_T0 ((uint32_t)0x00001000) /*!< A signal below the 2/T0 is filtering as noise. */
#define UART_NOISE_FILTER_4_T0 ((uint32_t)0x00002000) /*!< A signal below the 4/T0 is filtering as noise. */
#define UART_NOISE_FILTER_8_T0 ((uint32_t)0x00003000) /*!< A signal below the 8/T0 is filtering as noise. */
#define UART_NOISE_FILTER_2_CLOCK ((uint32_t)0x00004000) /*!< A signal below the 2/Clock is filtering as noise. */
#define UART_NOISE_FILTER_3_CLOCK ((uint32_t)0x00005000) /*!< A signal below the 3/Clock is filtering as noise. */
#define UART_NOISE_FILTER_4_CLOCK ((uint32_t)0x00006000) /*!< A signal below the 4/Clock is filtering as noise. */
#define UART_NOISE_FILTER_5_CLOCK ((uint32_t)0x00007000) /*!< A signal below the 5/Clock is filtering as noise */
/**
* @}
*/ /* End of group UART_NoiseFilter */
/**
* @defgroup UART_CTSHandshake CTS Handshake
* @brief Available CTS Handshake Macro Definition.
* @{
*/
#define UART_CTS_DISABLE ((uint32_t)0x00000000) /*!< Not Available. */
#define UART_CTS_ENABLE ((uint32_t)0x00000400) /*!< Available. */
/**
* @}
*/ /* End of group UART_CTSHandshake */
/**
* @defgroup UART_RTSHandshake RTS Handshake
* @brief Available RTS Handshake Macro Definition.
* @{
*/
#define UART_RTS_DISABLE ((uint32_t)0x00000000) /*!< Not Available. */
#define UART_RTS_ENABLE ((uint32_t)0x00000200) /*!< Available. */
/**
* @}
*/ /* End of group UART_RTSHandshake */
/**
* @defgroup UART_DataComplementation Data Complementation
* @brief Enable/Disable Data Signal Complementation Macro Definition.
* @{
*/
#define UART_DATA_COMPLEMENTION_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define UART_DATA_COMPLEMENTION_ENABLE ((uint32_t)0x00000040) /*!< Enable */
/**
* @}
*/ /* End of group UART_DataComplementation */
/**
* @defgroup UART_DataDirection Data Direction
* @brief Data Direction Macro Definition.
* @{
*/
#define UART_DATA_DIRECTION_LSB ((uint32_t)0x00000000) /*!< LSB first */
#define UART_DATA_DIRECTION_MSB ((uint32_t)0x00000020) /*!< MSB first */
/*!
* @}
*/ /* End of group UART_DataDirection */
/**
* @defgroup UART_StopBit Stop Bit
* @brief Stop Bit Macro Definition.
* @{
*/
#define UART_STOP_BIT_1 ((uint32_t)0x00000000) /*!< 1 bit */
#define UART_STOP_BIT_2 ((uint32_t)0x00000010) /*!< 2 bit */
/**
* @}
*/ /* End of group UART_StopBit */
/**
* @defgroup UART_ParityBit Parity Bit
* @brief Parity Bit Macro Definition.
* @{
*/
#define UART_PARITY_BIT_ODD ((uint32_t)0x00000000) /*!< Odd Parity */
#define UART_PARITY_BIT_EVEN ((uint32_t)0x00000008) /*!< Even Parity */
/**
* @}
*/ /* End of group UART_ParityBit */
/**
* @defgroup UART_ParityEnable Parity Enable
* @brief Enable/Disable Parity Macro Definition.
* @{
*/
#define UART_PARITY_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define UART_PARITY_ENABLE ((uint32_t)0x00000004) /*!< Enable */
/**
* @}
*/ /* End of group UART_ParityEnable */
/**
* @defgroup UART_DataLength Data Length
* @brief Data Length Macro Definition.
* @{
*/
#define UART_DATA_LENGTH_7 ((uint32_t)0x00000000) /*!< 7 bit */
#define UART_DATA_LENGTH_8 ((uint32_t)0x00000001) /*!< 8 bit */
#define UART_DATA_LENGTH_9 ((uint32_t)0x00000002) /*!< 9 bit */
/**
* @}
*/ /* End of group UART_DataLength */
/**
* @defgroup UART_TxFillLevelRange Tx Fill Level Range
* @brief Transmit Fill Level Range Macro Definition.
* @brief Range of Value be set "(UART_TX_FILL_LEVEL_MIN <= Value <= UART_TX_FILL_LEVEL_MAX)".
* @{
*/
#define UART_TX_FILL_RANGE_MIN ((uint32_t)0x00000000) /*!< Minimum Value :1 */
#define UART_TX_FILL_RANGE_MAX ((uint32_t)0x00000007) /*!< Maximum Value :7 */
/*!
* @}
*/ /* End of group UART_TxFillLevelRange */
/**
* @defgroup UART_RxFillLevelRange Rx Fill Level Range
* @brief Receive Fill Level Range Macro Definition.
* @brief Range of Value be set "(UART_RX_FILL_LEVEL_MIN <= Value <= UART_RX_FILL_LEVEL_MAX)".
* @{
*/
#define UART_RX_FILL_RANGE_MIN ((uint32_t)0x00000001) /*!< Minimum Value :1 */
#define UART_RX_FILL_RANGE_MAX ((uint32_t)0x00000008) /*!< Maximum Value :8 */
/**
* @}
*/ /* End of group UART_RxFillLevelRange */
/**
* @defgroup UART_TxFIFOInterrupt Tx FIFO Interrupt
* @brief Available Transmit FIFO Interrupt Macro Definition.
* @{
*/
#define UART_TX_FIFO_INT_DISABLE ((uint32_t)0x00000000) /*!< Not Available. */
#define UART_TX_FIFO_INT_ENABLE ((uint32_t)0x00000080) /*!< Available. */
/**
* @}
*/ /* End of group UART_TxFIFOInterrupt */
/**
* @defgroup UART_TxInterrupt Tx Interrupt
* @brief Available Transmit Interrupt Macro Definition.
* @{
*/
#define UART_TX_INT_DISABLE ((uint32_t)0x00000000) /*!< Not Available. */
#define UART_TX_INT_ENABLE ((uint32_t)0x00000040) /*!< Available. */
/**
* @}
*/ /* End of group UART_TxInterrupt */
/**
* @defgroup UART_RxFIFOInterrupt Rx FIFO Interrupt
* @brief Available Receive FIFO Interrupt Macro Definition.
* @{
*/
#define UART_RX_FIFO_INT_DISABLE ((uint32_t)0x00000000) /*!< Not Available. */
#define UART_RX_FIFO_INT_ENABLE ((uint32_t)0x00000020) /*!< Available. */
/**
* @}
*/ /* End of group UART_RxFIFOInterrupt */
/**
* @defgroup UART_RxInterrupt Rx Interrupt
* @brief Available Receive Interrupt Macro Definition.
* @{
*/
#define UART_RX_INT_DISABLE ((uint32_t)0x00000000) /*!< Not Available. */
#define UART_RX_INT_ENABLE ((uint32_t)0x00000010) /*!< Available. */
/**
* @}
*/ /* End of group UART_RxInterrupt */
/**
* @defgroup UART_ErrorInterrupt Error Interrupt
* @brief Enable/Disable Error Interrupt Macro Definition.
* @{
*/
#define UART_ERR_INT_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define UART_ERR_INT_ENABLE ((uint32_t)0x00000004) /*!< Enable */
/**
* @}
*/ /* End of group UART_ErrorInterrupt */
/**
* @defgroup UART_Prescaler Prescaler
* @brief Prescaler Macro Definition.
* @{
*/
#define UART_PLESCALER_1 ((uint32_t)0x00000000) /*!< 1/1 */
#define UART_PLESCALER_2 ((uint32_t)0x00000010) /*!< 1/2 */
#define UART_PLESCALER_4 ((uint32_t)0x00000020) /*!< 1/4 */
#define UART_PLESCALER_8 ((uint32_t)0x00000030) /*!< 1/8 */
#define UART_PLESCALER_16 ((uint32_t)0x00000040) /*!< 1/16 */
#define UART_PLESCALER_32 ((uint32_t)0x00000050) /*!< 1/32 */
#define UART_PLESCALER_64 ((uint32_t)0x00000060) /*!< 1/64 */
#define UART_PLESCALER_128 ((uint32_t)0x00000070) /*!< 1/128 */
#define UART_PLESCALER_256 ((uint32_t)0x00000080) /*!< 1/256 */
#define UART_PLESCALER_512 ((uint32_t)0x00000090) /*!< 1/512 */
/**
* @}
*/ /* End of group UART_Prescaler */
/**
* @defgroup UART_Clock_Mask Clock Mask
* @brief Clock Mask Macro Definition.
* @{
*/
#define UART_UARTxCLK_MASK ((uint32_t)0x00000000) /*!< [1:0] is always 0 */
/**
* @}
*/ /* End of group UART_Clock_Mask */
/**
* @defgroup UART_Division Division
* @brief Enable/Disable Division Macro Definition.
* @{
*/
#define UART_DIVISION_DISABLE ((uint32_t)0x00000000) /*!< Disable */
#define UART_DIVISION_ENABLE ((uint32_t)0x00800000) /*!< Enable */
/**
* @}
*/ /* End of group UART_Division */
/**
* @defgroup UART_RangeK Range K
* @brief Range of K Macro Definition.
* @brief Range of K be set "(UART_RANGE_K_MIN <= Value <= UART_RANGE_K_MAX)".
* @{
*/
#define UART_RANGE_K_MIN ((uint32_t)0x00000000) /*!< Minimum Value :K=0 */
#define UART_RANGE_K_MAX ((uint32_t)0x0000003F) /*!< Maximum Value :K=63 */
/**
* @}
*/ /* End of group UART_RangeK */
/**
* @defgroup UART_RangeN Range N
* @brief Range of N Macro Definition.
* @brief Range of N be set "(UART_RANGE_N_MIN <= Value <= UART_RANGE_N_MAX)".
* @{
*/
#define UART_RANGE_N_MIN ((uint32_t)0x00000001) /*!< Minimum Value :N=1 */
#define UART_RANGE_N_MAX ((uint32_t)0x0000FFFF) /*!< Maximum Value :N=65535 */
/**
* @}
*/ /* End of group UART_RangeN */
/**
* @defgroup UART_SettingEnable Setting Enable
* @brief Enable/Disable Setting Macro Definition.
* @{
*/
#define UART_SETTING_MASK ((uint32_t)0x80000000) /*!< for Mask */
#define UART_SETTING_ENABLE ((uint32_t)0x00000000) /*!< Setting Enable */
#define UART_SETTING_DISABLE ((uint32_t)0x80000000) /*!< Setting Disable */
/**
* @}
*/ /* End of group UART_SettingEnable */
/**
* @defgroup UART_TxState Tx State
* @brief Transmitting State Macro Definition.
* @{
*/
#define UART_TX_STATE_MASK ((uint32_t)0x00008000) /*!< for Mask */
#define UART_TX_STATE_SLEEP ((uint32_t)0x00000000) /*!< Sleep */
#define UART_TX_STATE_RUN ((uint32_t)0x00008000) /*!< Run */
/**
* @}
*/ /* End of group UART_TxState */
/**
* @defgroup UART_TxDone Transmitting Done
* @brief Transmitting Done Macro Definition.
* @{
*/
#define UART_TX_MASK ((uint32_t)0x00004000) /*!< for Mask */
#define UART_TX_DONE ((uint32_t)0x00004000) /*!< Transmitting Done */
/**
* @}
*/ /* End of group UART_TxDone */
/**
* @defgroup UART_TxReachFillLevel Tx Reach Fill Level
* @brief Reach Transmitting Fill Level Macro Definition.
* @{
*/
#define UART_TX_REACH_FILL_MASK ((uint32_t)0x00002000) /*!< for Mask */
#define UART_TX_REACH_FILL_LEVEL ((uint32_t)0x00002000) /*!< Reach Transmitting Fill Level */
/**
* @}
*/ /* End of group UART_TxReachFillLevel */
/**
* @defgroup UART_TxFifoLevel Tx FIFO Fill Level
* @brief Transmitting FIFO Fill Level Macro Definition.
* @{
*/
#define UART_TX_FIFO_LEVEL_MASK ((uint32_t)0x00000F00) /*!< for Mask */
/**
* @}
*/ /* End of group UART_TxFifoLevel */
/**
* @defgroup UART_RxState Rx State
* @brief Receive State Macro Definition.
* @{
*/
#define UART_RX_STATE_MASK ((uint32_t)0x00000080) /*!< for Mask */
#define UART_RX_STATE_SLEEP ((uint32_t)0x00000000) /*!< Sleep */
#define UART_RX_STATE_RUN ((uint32_t)0x00000080) /*!< Run */
/**
* @}
*/ /* End of group UART_RxState */
/**
* @defgroup UART_RxDone Rx Done
* @brief Receive Done Macro Definition.
* @{
*/
#define UART_RX_MASK ((uint32_t)0x00000040) /*!< for Mask */
#define UART_RX_DONE ((uint32_t)0x00000040) /*!< Receive Done */
/**
* @}
*/ /* End of group UART_RxDone */
/**
* @defgroup UART_RxReachFillLevel Rx Reach Fill Level
* @brief Reach Receive Fill Level Macro Definition.
* @{
*/
#define UART_RX_REACH_FILL_MASK ((uint32_t)0x00000020) /*!< for Mask */
#define UART_RX_REACH_FILL_LEVEL ((uint32_t)0x00000020) /*!< Reach Receive Fill Level */
/**
* @}
*/ /* End of group UART_RxReachFillLevel */
/**
* @defgroup UART_RxFifoLevel Rx FIFO Fill Level
* @brief Receive FIFO Fill Level Macro Definition.
* @{
*/
#define UART_RX_FIFO_LEVEL_MASK ((uint32_t)0x0000000F) /*!< for Mask */
/**
* @}
*/ /* End of group UART_RxFifoLevel */
/**
* @defgroup UART_TriggerErr Trigger Error
* @brief Trigger Error Macro Definition.
* @{
*/
#define UART_TRIGGER_NO_ERR ((uint32_t)0x00000000) /*!< No Error */
#define UART_TRIGGER_ERR ((uint32_t)0x00000010) /*!< Error */
/**
* @}
*/ /* End of group UART_TxTriggerErr */
/**
* @defgroup UART_OverrunErr Overrun Error
* @brief Overrun Error Macro Definition.
* @{
*/
#define UART_OVERRUN_NO_ERR ((uint32_t)0x00000000) /*!< No Error */
#define UART_OVERRUN_ERR ((uint32_t)0x00000008) /*!< Error */
/**
* @}
*/ /* End of group UART_OverrunErr */
/**
* @defgroup UART_ParityErr Parity Error
* @brief Parity Error Macro Definition.
* @{
*/
#define UART_PARITY_NO_ERR ((uint32_t)0x00000000) /*!< No Error */
#define UART_PARITY_ERR ((uint32_t)0x00000004) /*!< Error */
/**
* @}
*/ /* End of group UART_ParityErr */
/**
* @defgroup UART_FramingErr Framing Error
* @brief Framing Error Macro Definition.
* @{
*/
#define UART_FRAMING_NO_ERR ((uint32_t)0x00000000) /*!< No Error */
#define UART_FRAMING_ERR ((uint32_t)0x00000002) /*!< Error */
/**
* @}
*/ /* End of group UART_FramingErr */
/**
* @defgroup UART_BreakErr Break Error
* @brief Break Error Macro Definition.
* @{
*/
#define UART_BREAK_NO_ERR ((uint32_t)0x00000000) /*!< No Error */
#define UART_BREAK_ERR ((uint32_t)0x00000001) /*!< Error */
/**
* @}
*/ /* End of group UART_BreakErr */
/**
* @}
*/ /* End of group UART_Exported_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup UART_Exported_define UART Exported Define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group UART_Exported_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @defgroup UART_Exported_typedef UART Exported Typedef
* @{
*/
/*----------------------------------*/
/**
* @brief Receive event information structure definition.
* @brief When data length definition is "7 or 8bit"( @ref UART_DataLength ), use this.
* @attention "num" must be over FIFO max num.
*/
/*----------------------------------*/
typedef struct
{
uint8_t *p_data; /*!< The buffer to receive data. */
uint32_t num; /*!< The number of receive data. */
} uart_receive8_t;
/*----------------------------------*/
/**
* @brief Receive event information structure definition.
* @brief When data length definition is "9bit"( @ref UART_DataLength ), use this.
*/
/*----------------------------------*/
typedef struct
{
uint16_t *p_data; /*!< The buffer to receive data. */
uint32_t num; /*!< The number of receive data. */
} uart_receive16_t;
/*----------------------------------*/
/**
* @brief Receive event information structure definition.
*/
/*----------------------------------*/
typedef union
{
uart_receive8_t rx8; /*!< @ref uart_receive8_t */
uart_receive16_t rx16; /*!< @ref uart_receive16_t */
} uart_receive_t;
/*----------------------------------*/
/**
* @brief Transmit data information structure definition.
* @brief When data length definition is "7 or 8bit"( @ref UART_DataLength ), use this.
*/
/*----------------------------------*/
typedef struct
{
uint8_t *p_data; /*!< The buffer to transmit data. */
uint32_t num; /*!< The number of transmit data. */
} uart_transmit8_t;
/*----------------------------------*/
/**
* @brief Transmit data information structure definition.
* @brief When data length definition is "9bit"( @ref UART_DataLength ), use this.
*/
/*----------------------------------*/
typedef struct
{
uint16_t *p_data; /*!< The buffer to transmit data.
Rransmit data valid range is ( 0x0000 <= range <= 0x01FF ) */
uint32_t num; /*!< The number of transmit data. */
} uart_transmit16_t;
/*----------------------------------*/
/**
* @brief Transmit data information structure definition.
*/
/*----------------------------------*/
typedef union
{
uart_transmit8_t tx8; /*!< @ref uart_transmit8_t */
uart_transmit16_t tx16; /*!< @ref uart_transmit16_t */
} uart_transmit_t;
/*----------------------------------*/
/**
* @brief Clock setting structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint32_t prsel; /*!< Prescaler.
: Use @ref UART_Prescaler */
} uart_clock_t;
/*----------------------------------*/
/**
* @brief Boudrate setting structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint32_t ken; /*!< Enable/Disable Division Definition.
: Use @ref UART_Division */
uint32_t brk; /*!< Division Value K.
: K Range ( UART_RANGE_K_MIN <= K =< UART_RANGE_K_MAX ) @ref UART_RangeK */
uint32_t brn; /*!< Division Value N.
: N Range ( UART_RANGE_N_MIN <= N =< UART_RANGE_N_MAX ) @ref UART_RangeN */
} uart_boudrate_t;
/*----------------------------------*/
/**
* @brief Transmit FIFO setting.
*/
/*----------------------------------*/
typedef struct
{
uint32_t inttx; /*!< Available Transmit FIFO Interrupt.
: Use @ref UART_TxFIFOInterrupt */
uint32_t level; /*!< Transmit Fill Level.
: Range ( UART_TX_FILL_RANGE_MIN <= K =< UART_TX_FILL_RANGE_MAX ) @ref UART_TxFillLevelRange */
} uart_tx_fifo_t;
/*----------------------------------*/
/**
* @brief Receive FIFO setting.
*/
/*----------------------------------*/
typedef struct
{
uint32_t intrx; /*!< Available Receive FIFO Interrupt.
: Use @ref UART_RxFIFOInterrupt */
uint32_t level; /*!< Receive Fill Level.
: Range ( UART_RX_FILL_RANGE_MIN <= K =< UART_RX_FILL_RANGE_MAX ) @ref UART_RxFillLevelRange */
} uart_rx_fifo_t;
/*----------------------------------*/
/**
* @brief Initial setting structure definition.
*/
/*----------------------------------*/
typedef struct
{
uint32_t id; /*!< ID: User value. */
uart_clock_t clock; /*!< Clock setting.
: Use @ref uart_clock_t */
uart_boudrate_t boudrate; /*!< Boudrate setting.
: Use @ref uart_boudrate_t */
uint32_t inttx; /*!< Available Transmit Interrupt.
: Use @ref UART_TxInterrupt */
uint32_t intrx; /*!< Available Receive Interrupt.
: Use @ref UART_RxInterrupt */
uint32_t interr; /*!< Available Error Interrupt.
: Use @ref UART_ErrorInterrupt */
uart_tx_fifo_t txfifo; /*!< Transmit FIFO setting.
: Use @ref uart_tx_fifo_t */
uart_rx_fifo_t rxfifo; /*!< Receive FIFO setting.
: Use @ref uart_rx_fifo_t */
uint32_t hct; /*!< Half Clock Terminal Select.
: Use @ref UART_HalfClockSelect */
uint32_t hcm; /*!< Half Clock Mode Select.
: Use @ref UART_HalfClockMode */
uint32_t hcc; /*!< Half Clock Control.
: Use @ref UART_HalfClockCTR */
uint32_t lbc; /*!< Loop Back Control.
: Use @ref UART_LoopBack */
uint32_t nf; /*!< UTxRXD Noise Filter.
: Use @ref UART_NoiseFilter */
uint32_t ctse; /*!< Available CTS Handshake.
: Use @ref UART_CTSHandshake */
uint32_t rtse; /*!< Available RTS Handshake.
: Use @ref UART_RTSHandshake */
uint32_t iv; /*!< Data Signal Complementation.
: Use @ref UART_DataComplementation */
uint32_t dir; /*!< Data Direction.
: Use @ref UART_DataDirection */
uint32_t sblen; /*!< Stop Bit.
: Use @ref UART_StopBit */
uint32_t even; /*!< Odd/Even Parity Bit.
: Use @ref UART_ParityBit */
uint32_t pe; /*!< Enable/Disable Parity Bit.
: Use @ref UART_ParityEnable */
uint32_t sm; /*!< Data Length.
: Use @ref UART_DataLength */
} uart_initial_setting_t;
/*----------------------------------*/
/**
* @brief UART handle structure definition.
*/
/*----------------------------------*/
typedef struct
{
TSB_UART_TypeDef *p_instance; /*!< Registers base address. */
uart_initial_setting_t init; /*!< Initial setting. */
/*------------------------------------------*/
/*!
@brief Transmit Information.
*/
/*------------------------------------------*/
struct
{
uint32_t rp; /*!< Num of transmitted data. */
uart_transmit_t info; /*!< Transmit Data Information. */
void (*handler)(uint32_t id, TXZ_Result result); /*!< Transmit Event handler. */
} transmit;
/*------------------------------------------*/
/*!
@brief Receive Information.
*/
/*------------------------------------------*/
struct
{
uart_receive_t info; /*!< Receive Data Information. */
void (*handler)(uint32_t id, TXZ_Result result, uart_receive_t *p_info); /*!< Receive Event handler. */
} receive;
} uart_t;
/**
* @}
*/ /* End of group UART_Exported_typedef */
/*------------------------------------------------------------------------------*/
/* Functions */
/*------------------------------------------------------------------------------*/
/**
* @defgroup UART_Exported_functions UART Exported Functions
* @{
*/
TXZ_Result uart_init(uart_t *p_obj);
TXZ_Result uart_deinit(uart_t *p_obj);
TXZ_Result uart_discard_transmit(uart_t *p_obj);
TXZ_Result uart_discard_receive(uart_t *p_obj);
TXZ_Result uart_transmitIt(uart_t *p_obj, uart_transmit_t *p_info);
TXZ_Result uart_receiveIt(uart_t *p_obj, uart_receive_t *p_info);
void uart_transmit_irq_handler(uart_t *p_obj);
void uart_receive_irq_handler(uart_t *p_obj);
void uart_error_irq_handler(uart_t *p_obj);
TXZ_Result uart_get_status(uart_t *p_obj, uint32_t *p_status);
TXZ_Result uart_get_error(uart_t *p_obj, uint32_t *p_error);
TXZ_Result uart_get_boudrate_setting(uint32_t clock, uart_clock_t *p_clk, uint32_t boudrate, uart_boudrate_t *p_setting);
/**
* @}
*/ /* End of group UART_Exported_functions */
/**
* @}
*/ /* End of group UART */
/**
* @}
*/ /* End of group Periph_Driver */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __UART_H */

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targets/TARGET_TOSHIBA/TARGET_TMPM4G9/Periph_Driver/inc/txz_uart_include.h Normal file
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@@ -0,0 +1,498 @@
/**
*******************************************************************************
* @file txz_uart_include.h
* @brief This file provides internal common definition.
* @version V1.0.0.0
* $Date:: 2017-07-21 15:39:36 #$
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*------------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion */
/*------------------------------------------------------------------------------*/
#ifndef __UART_INCLUDE_H
#define __UART_INCLUDE_H
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Includes */
/*------------------------------------------------------------------------------*/
#include "txz_driver_def.h"
/**
* @addtogroup Periph_Driver
* @{
*/
/**
* @addtogroup UART
* @{
*/
/*------------------------------------------------------------------------------*/
/* Macro Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UART_Private_define
* @{
*/
/**
* @defgroup UART_NullPointer Null Pointer
* @brief Null Pointer.
* @{
*/
#define UART_NULL ((void *)0)
/**
* @}
*/ /* End of group UART_NullPointer */
/**
* @defgroup UART_ParameterResult Parameter Check Result
* @brief Whether the parameter is specified or not.
* @{
*/
#define UART_PARAM_OK ((int32_t)1) /*!< Parameter is valid(specified). */
#define UART_PARAM_NG ((int32_t)0) /*!< Parameter is invalid(not specified). */
/**
* @}
*/ /* End of group UART_ParameterResult */
/**
* @defgroup UARTxSWRST UARTxSWRST Register
* @brief UARTxSWRST Register Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-8 | - |
* | 7 | SWRSTF |
* | 6:2 | - |
* | 1:0 | SWRST |
* @{
*/
/* SWRSTF */
#define UARTxSWRST_SWRSTF_MASK ((uint32_t)0x00000080) /*!< SWRSTF :Mask. */
#define UARTxSWRST_SWRSTF_IDLE ((uint32_t)0x00000000) /*!< SWRSTF :Not be "Software Reset". */
#define UARTxSWRST_SWRSTF_RUN ((uint32_t)0x00000080) /*!< SWRSTF :During "Software Reset". */
/* SWRST */
#define UARTxSWRST_SWRST_10 ((uint32_t)0x00000002) /*!< SWRST :"10" */
#define UARTxSWRST_SWRST_01 ((uint32_t)0x00000001) /*!< SWRST :"01" */
/**
* @}
*/ /* End of group UARTxSWRST */
/**
* @defgroup UARTxCR0 UARTxCR0 Register
* @brief UARTxCR0 Register Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-19 | - |
* | 18 | HBSST |
* | 17 | HBSMD |
* | 16 | HBSEN |
* | 15 | LPB |
* | 14-12 | NF[2:0] |
* | 11 | - |
* | 10 | CTSE |
* | 9 | RTSE |
* | 8 | WU |
* | 7 | - |
* | 6 | IV |
* | 5 | DIR |
* | 4 | SBLEN |
* | 3 | EVEN |
* | 2 | PE |
* | 1-0 | SM[1:0] |
* @{
*/
/* HBSST */
#define UARTxCR0_HBSST_MASK ((uint32_t)0x00040000) /*!< HBSST :Mask. */
/* HBSMD */
#define UARTxCR0_HBSMD_MASK ((uint32_t)0x00020000) /*!< HBSMD :Mask. */
/* HBSEN */
#define UARTxCR0_HBSEN_MASK ((uint32_t)0x00010000) /*!< HBSEN :Mask. */
#define UARTxCR0_HBSEN_DISABLE ((uint32_t)0x00000000) /*!< HBSEN :Disable. */
#define UARTxCR0_HBSEN_ENABLE ((uint32_t)0x00010000) /*!< HBSEN :Enable. */
/* LPB */
#define UARTxCR0_LPB_MASK ((uint32_t)0x00008000) /*!< LPB :Mask. */
#define UARTxCR0_LPB_DISABLE ((uint32_t)0x00000000) /*!< LPB :Disable. */
#define UARTxCR0_LPB_ENABLE ((uint32_t)0x00008000) /*!< LPB :Enable. */
/* WU */
#define UARTxCR0_WU_MASK ((uint32_t)0x00000100) /*!< WU :Mask. */
#define UARTxCR0_WU_DISABLE ((uint32_t)0x00000000) /*!< WU :Disable. */
#define UARTxCR0_WU_ENABLE ((uint32_t)0x00000100) /*!< WU :Enable. */
/**
* @}
*/ /* End of group UARTxCR0 */
/**
* @defgroup UARTxCR1 UARTxCR1 Register
* @brief UARTxCR1 Register Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-15 | - |
* | 14-12 | TIL[2:0] |
* | 11 | - |
* | 10-8 | RIL[2:0] |
* | 7 | INTTXFE |
* | 6 | INTTXWE |
* | 5 | INTRXFE |
* | 4 | INTRXWE |
* | 3 | - |
* | 2 | INTERR |
* | 1 | DMATE |
* | 0 | DMARE |
* @{
*/
/* RIL */
#define UARTxCR1_RIL_MASK ((uint32_t)0x00000700) /*!< RIL :Mask. */
/* DMATE */
#define UARTxCR1_DMATE_MASK ((uint32_t)0x00000002) /*!< DMATE :Mask. */
#define UARTxCR1_DMATE_DISABLE ((uint32_t)0x00000000) /*!< DMATE :Disable. */
#define UARTxCR1_DMATE_ENABLE ((uint32_t)0x00000002) /*!< DMATE :Enable. */
/* DMARE */
#define UARTxCR1_DMARE_MASK ((uint32_t)0x00000001) /*!< DMARE :Mask. */
#define UARTxCR1_DMARE_DISABLE ((uint32_t)0x00000000) /*!< DMARE :Disable. */
#define UARTxCR1_DMARE_ENABLE ((uint32_t)0x00000001) /*!< DMARE :Enable. */
/**
* @}
*/ /* End of group UARTxCR1 */
/**
* @defgroup UARTxTRANS UARTxTRANS Register
* @brief UARTxTRANS Register Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-4 | - |
* | 3 | BK |
* | 2 | TXTRG |
* | 1 | TXE |
* | 0 | RXE |
* @{
*/
/* BK */
#define UARTxTRANS_BK_MASK ((uint32_t)0x00000008) /*!< BK :Mask */
#define UARTxTRANS_BK_STOP ((uint32_t)0x00000000) /*!< BK :Stop */
#define UARTxTRANS_BK_SEND ((uint32_t)0x00000008) /*!< BK :Send */
/* TXTRG */
#define UARTxTRANS_TXTRG_MASK ((uint32_t)0x00000004) /*!< TXTRG :Mask */
#define UARTxTRANS_TXTRG_DISABLE ((uint32_t)0x00000000) /*!< TXTRG :Disable */
#define UARTxTRANS_TXTRG_ENABLE ((uint32_t)0x00000004) /*!< TXTRG :Enable */
/* TXE */
#define UARTxTRANS_TXE_MASK ((uint32_t)0x00000002) /*!< TXE :Mask */
#define UARTxTRANS_TXE_DISABLE ((uint32_t)0x00000000) /*!< TXE :Disable */
#define UARTxTRANS_TXE_ENABLE ((uint32_t)0x00000002) /*!< TXE :Enable */
/* RXE */
#define UARTxTRANS_RXE_MASK ((uint32_t)0x00000001) /*!< RXE :Mask */
#define UARTxTRANS_RXE_DISABLE ((uint32_t)0x00000000) /*!< RXE :Disable */
#define UARTxTRANS_RXE_ENABLE ((uint32_t)0x00000001) /*!< RXE :Enable */
/* TXE,RXE */
#define UARTxTRANS_TXE_RXE_MASK ((uint32_t)0x00000003) /*!< TXE/RXE:Mask */
/**
* @}
*/ /* End of group UARTxTRANS */
/**
* @defgroup UARTxDR UARTxDR Register
* @brief UARTxDR Register Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-19 | - |
* | 18 | PERR |
* | 17 | FERR |
* | 16 | BERR |
* | 15:9 | - |
* | 8:0 | DR |
* @{
*/
/* DR */
#define UARTxDR_DR_9BIT_MASK ((uint32_t)0x000001FF) /*!< DR :Mask for 9bit */
#define UARTxDR_DR_8BIT_MASK ((uint32_t)0x000000FF) /*!< DR :Mask for 8bit */
#define UARTxDR_DR_7BIT_MASK ((uint32_t)0x0000007F) /*!< DR :Mask for 7bit */
/**
* @}
*/ /* End of group UARTxDR */
/**
* @defgroup UARTxSR UARTxSR Register
* @brief UARTxSR Register Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31 | SUE |
* | 30:16 | - |
* | 15 | TXRUN |
* | 14 | TXEND |
* | 13 | TXFF |
* | 12 | - |
* | 11:8 | TLVL |
* | 7 | RXRUN |
* | 6 | RXEND |
* | 5 | RXFF |
* | 4 | - |
* | 3:0 | RLVL |
* @{
*/
/* SUE */
#define UARTxSR_SUE_MASK ((uint32_t)0x80000000) /*!< SUE :Mask. */
/* TXEND */
#define UARTxSR_TXEND_MASK ((uint32_t)0x00004000) /*!< TEXND :Mask. */
#define UARTxSR_TXEND_R_END ((uint32_t)0x00004000) /*!< TXEND :[read] Transfer done. */
#define UARTxSR_TXEND_W_CLEAR ((uint32_t)0x00004000) /*!< TXEND :[write] Clear Flag. */
/* TXFF */
#define UARTxSR_TXFF_MASK ((uint32_t)0x00002000) /*!< TXFF :Mask. */
#define UARTxSR_TXFF_R_REACHED ((uint32_t)0x00002000) /*!< TXFF :[read] Reached the transfer level. */
#define UARTxSR_TXFF_W_CLEAR ((uint32_t)0x00002000) /*!< TXFF :[write] Clear Flag. */
/* TLVL */
#define UARTxSR_TLVL_MASK ((uint32_t)0x00000F00) /*!< TLVL :Mask. */
/* RXEND */
#define UARTxSR_RXEND_MASK ((uint32_t)0x00000040) /*!< RXEND :Mask. */
#define UARTxSR_RXEND_R_END ((uint32_t)0x00000040) /*!< RXEND :[read] Receive done. */
#define UARTxSR_RXEND_W_CLEAR ((uint32_t)0x00000040) /*!< RXEND :[write] Clear Flag. */
/* RXFF */
#define UARTxSR_RXFF_MASK ((uint32_t)0x00000020) /*!< RXFF :Mask. */
#define UARTxSR_RXFF_R_REACHED ((uint32_t)0x00000020) /*!< RXFF :[read] Receive done. */
#define UARTxSR_RXFF_W_CLEAR ((uint32_t)0x00000020) /*!< RXFF :[write] Clear Flag. */
/* RLVL */
#define UARTxSR_RLVL_MASK ((uint32_t)0x0000000F) /*!< RLVL :Mask. */
/**
* @}
*/ /* End of group UARTxSR */
/**
* @defgroup UARTxFIFOCLR UARTxFIFOCLR Register
* @brief UARTxFIFOCLR Register Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-2 | - |
* | 1 | TFCLR |
* | 0 | RFCLR |
* @{
*/
/* TFCLR */
#define UARTxFIFOCLR_TFCLR_CLEAR ((uint32_t)0x00000002) /*!< TFCLR :Clear the transmit buff. */
/* RFCLR */
#define UARTxFIFOCLR_RFCLR_CLEAR ((uint32_t)0x00000001) /*!< RFCLR :Clear the receive buff. */
/**
* @}
*/ /* End of group UARTxFIFOCLR */
/**
* @defgroup UARTxERR UARTxERR Register
* @brief UARTxERR Register Definition.
* @details Detail.
* | Bit | Bit Symbol |
* | :--- | :--- |
* | 31-5 | - |
* | 4 | TRGERR |
* | 3 | OVRERR |
* | 2 | PERR |
* | 1 | FERR |
* | 0 | BERR |
* @{
*/
/* TRGERR */
#define UARTxERR_TRGERR_MASK ((uint32_t)0x00000010) /*!< TRGERR :Mask. */
#define UARTxERR_TRGERR_R_NO_ERR ((uint32_t)0x00000000) /*!< TRGERR :[read] No Error. */
#define UARTxERR_TRGERR_R_ERR ((uint32_t)0x00000010) /*!< TRGERR :[read] Error. */
#define UARTxERR_TRGERR_W_CLEAR ((uint32_t)0x00000010) /*!< TRGERR :[write] Clear Flag. */
/* OVRERR */
#define UARTxERR_OVRERR_MASK ((uint32_t)0x00000008) /*!< OVRERR :Mask. */
#define UARTxERR_OVRERR_R_NO_ERR ((uint32_t)0x00000000) /*!< OVRERR :[read] No Error. */
#define UARTxERR_OVRERR_R_ERR ((uint32_t)0x00000008) /*!< OVRERR :[read] Error. */
#define UARTxERR_OVRERR_W_CLEAR ((uint32_t)0x00000008) /*!< OVRERR :[write] Clear Flag. */
/* PERR */
#define UARTxERR_PERR_MASK ((uint32_t)0x00000004) /*!< PERR :Mask. */
#define UARTxERR_PERR_R_NO_ERR ((uint32_t)0x00000000) /*!< PERR :[read] No Error. */
#define UARTxERR_PERR_R_ERR ((uint32_t)0x00000004) /*!< PERR :[read] Error. */
#define UARTxERR_PERR_W_CLEAR ((uint32_t)0x00000004) /*!< PERR :[write] Clear Flag. */
/* FERR */
#define UARTxERR_FERR_MASK ((uint32_t)0x00000002) /*!< FERR :Mask. */
#define UARTxERR_FERR_R_NO_ERR ((uint32_t)0x00000000) /*!< FERR :[read] No Error. */
#define UARTxERR_FERR_R_ERR ((uint32_t)0x00000002) /*!< FERR :[read] Error. */
#define UARTxERR_FERR_W_CLEAR ((uint32_t)0x00000002) /*!< FERR :[write] Clear Flag. */
/* BERR */
#define UARTxERR_BERR_MASK ((uint32_t)0x00000001) /*!< BERR :Mask. */
#define UARTxERR_BERR_R_NO_ERR ((uint32_t)0x00000000) /*!< BERR :[read] No Error. */
#define UARTxERR_BERR_R_ERR ((uint32_t)0x00000001) /*!< BERR :[read] Error. */
#define UARTxERR_BERR_W_CLEAR ((uint32_t)0x00000001) /*!< BERR :[write] Clear Flag. */
/**
* @}
*/ /* End of group UARTxERR */
/**
* @}
*/ /* End of group UART_Private_define */
/*------------------------------------------------------------------------------*/
/* Enumerated Type Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UART_Private_define
* @{
*/
/* no define */
/**
* @}
*/ /* End of group UART_Private_define */
/*------------------------------------------------------------------------------*/
/* Structure Definition */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UART_Private_typedef
* @{
*/
/* no define */
/**
* @}
*/ /* End of group UART_Private_typedef */
/*------------------------------------------------------------------------------*/
/* Inline Functions */
/*------------------------------------------------------------------------------*/
/**
* @addtogroup UART_Private_functions
* @{
*/
__STATIC_INLINE void disable_UARTxTRANS_TXE(TSB_UART_TypeDef *p_instance);
__STATIC_INLINE void enable_UARTxTRANS_TXE(TSB_UART_TypeDef *p_instance);
__STATIC_INLINE void disable_UARTxTRANS_RXE(TSB_UART_TypeDef *p_instance);
__STATIC_INLINE void enable_UARTxTRANS_RXE(TSB_UART_TypeDef *p_instance);
/*--------------------------------------------------*/
/**
* @brief Disable UARTxTRANS TXE.
* @param p_instance: Instance address.
* @retval -
* @note Bitband Access
*/
/*--------------------------------------------------*/
__STATIC_INLINE void disable_UARTxTRANS_TXE(TSB_UART_TypeDef *p_instance)
{
#ifdef DEBUG
if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
{
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,1))) = 0;
}
#else
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,1))) = 0;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Enable UARTxTRANS TXE.
* @param p_instance: Instance address.
* @retval -
* @note Bitband Access
*/
/*--------------------------------------------------*/
__STATIC_INLINE void enable_UARTxTRANS_TXE(TSB_UART_TypeDef *p_instance)
{
#ifdef DEBUG
if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
{
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,1))) = 1;
}
#else
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,1))) = 1;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Disable UARTxTRANS RXE.
* @param p_instance: Instance address.
* @retval -
* @note Bitband Access
*/
/*--------------------------------------------------*/
__STATIC_INLINE void disable_UARTxTRANS_RXE(TSB_UART_TypeDef *p_instance)
{
#ifdef DEBUG
if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
{
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,0))) = 0;
}
#else
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,0))) = 0;
#endif
}
/*--------------------------------------------------*/
/**
* @brief Enable UARTxTRANS RXE.
* @param p_instance: Instance address.
* @retval -
* @note Bitband Access
*/
/*--------------------------------------------------*/
__STATIC_INLINE void enable_UARTxTRANS_RXE(TSB_UART_TypeDef *p_instance)
{
#ifdef DEBUG
if ((uint32_t)p_instance >= (uint32_t)PERI_BASE)
{
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,0))) = 1;
}
#else
(*((__IO uint32_t *)BITBAND_PERI(&p_instance->TRANS,0))) = 1;
#endif
}
/**
* @}
*/ /* End of group UART_Private_functions */
/**
* @}
*/ /* End of group UART */
/**
* @}
*/ /* End of group Periph_Driver */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __UART_EX_H */