Import Mbed OS hard-float snapshot
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310
targets/TARGET_TOSHIBA/TARGET_TMPM4G9/i2c_api.c
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310
targets/TARGET_TOSHIBA/TARGET_TMPM4G9/i2c_api.c
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/* mbed Microcontroller Library
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*
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* Copyright (C) 2019, Toshiba Electronic Device Solutions Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "i2c_api.h"
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#if DEVICE_I2C
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#include <stdlib.h>
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#include <string.h>
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#include "mbed_error.h"
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#include "PeripheralNames.h"
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#include "pinmap.h"
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#include "txz_i2c_api.h"
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#define MAX_I2C_FREQ 1000000
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#define I2C_TRANSFER_STATE_IDLE (0x0U)
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#if DEVICE_I2C_ASYNCH
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#define I2C_S(obj) (struct i2c_s *) (&((obj)->i2c))
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#else
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#define I2C_S(obj) (struct i2c_s *) (obj)
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#endif
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static const PinMap PinMap_I2C_SDA[] = {
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{PG2, I2C_0, PIN_DATA(7, 2)},
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{PF2, I2C_1, PIN_DATA(7, 2)},
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{PG4, I2C_2, PIN_DATA(7, 2)},
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{PJ6, I2C_3, PIN_DATA(7, 2)},
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{PJ3, I2C_4, PIN_DATA(7, 2)},
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{NC, NC, 0}
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};
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static const PinMap PinMap_I2C_SCL[] = {
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{PG3, I2C_0, PIN_DATA(7, 2)},
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{PF3, I2C_1, PIN_DATA(7, 2)},
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{PG5, I2C_2, PIN_DATA(7, 2)},
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{PJ7, I2C_3, PIN_DATA(7, 2)},
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{PJ2, I2C_4, PIN_DATA(7, 2)},
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{NC, NC, 0}
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};
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// Initialize the I2C peripheral. It sets the default parameters for I2C
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void i2c_init(i2c_t *obj, PinName sda, PinName scl)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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MBED_ASSERT(obj_s != NULL);
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I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
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I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
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I2CName i2c_name = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
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MBED_ASSERT((int)i2c_name != NC);
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obj_s->index = i2c_name;
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obj_s->is_master = 1;
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switch (i2c_name) {
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case I2C_0:
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TSB_CG_FSYSMENA_IPMENA29 = TXZ_ENABLE; // Enable clock for I2C_0
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TSB_CG_FSYSMENB_IPMENB08 = TXZ_ENABLE; // Enable clock for GPIO G
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obj_s->my_i2c.i2c.p_instance = TSB_I2C0;
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obj_s->irqn = INTI2C0_IRQn;
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break;
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case I2C_1:
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TSB_CG_FSYSMENA_IPMENA30 = TXZ_ENABLE; // Enable clock for I2C_1
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TSB_CG_FSYSMENB_IPMENB07 = TXZ_ENABLE; // Enable clock for GPIO F
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obj_s->my_i2c.i2c.p_instance = TSB_I2C1;
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obj_s->irqn = INTI2C1_IRQn;
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break;
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case I2C_2:
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TSB_CG_FSYSMENA_IPMENA31 = TXZ_ENABLE; // Enable clock for I2C_2
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TSB_CG_FSYSMENB_IPMENB08 = TXZ_ENABLE; // Enable clock for GPIO G
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obj_s->my_i2c.i2c.p_instance = TSB_I2C2;
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obj_s->irqn = INTI2C2_IRQn;
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break;
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case I2C_3:
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TSB_CG_FSYSMENB_IPMENB00 = TXZ_ENABLE; // Enable clock for I2C_3
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TSB_CG_FSYSMENB_IPMENB10 = TXZ_ENABLE; // Enable clock for GPIO J
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obj_s->my_i2c.i2c.p_instance = TSB_I2C3;
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obj_s->irqn = INTI2C3_IRQn;
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break;
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case I2C_4:
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TSB_CG_FSYSMENB_IPMENB01 = TXZ_ENABLE; // Enable clock for I2C_4
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TSB_CG_FSYSMENB_IPMENB10 = TXZ_ENABLE; // Enable clock for GPIO J
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obj_s->my_i2c.i2c.p_instance = TSB_I2C4;
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obj_s->irqn = INTI2C4_IRQn;
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break;
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default:
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error("I2C is not available");
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break;
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}
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pinmap_pinout(sda, PinMap_I2C_SDA);
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pin_mode(sda, OpenDrain);
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pin_mode(sda, PullUp);
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pinmap_pinout(scl, PinMap_I2C_SCL);
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pin_mode(scl, OpenDrain);
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pin_mode(scl, PullUp);
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i2c_reset(obj);
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i2c_frequency(obj, 100000);
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I2C_init(&obj_s->my_i2c.i2c);
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}
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// Configure the I2C frequency
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void i2c_frequency(i2c_t *obj, int hz)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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if (hz > MAX_I2C_FREQ) {
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error("Failed : Max I2C frequency is 1000000");
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}
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i2c_frequency_t(&obj_s->my_i2c, hz);
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if(obj_s->is_master) {
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I2C_init(&obj_s->my_i2c.i2c);
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} else {
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I2C_slave_init(&obj_s->my_i2c.i2c);
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}
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}
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int i2c_start(i2c_t *obj)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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i2c_start_t(&obj_s->my_i2c);
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return TXZ_SUCCESS;
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}
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int i2c_stop(i2c_t *obj)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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i2c_stop_t(&obj_s->my_i2c);
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return TXZ_SUCCESS;
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}
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void i2c_reset(i2c_t *obj)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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// Software reset
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i2c_reset_t(&obj_s->my_i2c);
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}
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int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
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{
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int32_t count = 0;
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struct i2c_s *obj_s = I2C_S(obj);
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count = i2c_read_t(&obj_s->my_i2c, address, (uint8_t *)data, length, stop);
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return count;
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}
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int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
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{
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int32_t count = 0;
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struct i2c_s *obj_s = I2C_S(obj);
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count = i2c_write_t(&obj_s->my_i2c, address, (uint8_t *)data, length, stop);
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return count;
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}
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int i2c_byte_read(i2c_t *obj, int last)
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{
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int32_t data = 0;
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struct i2c_s *obj_s = I2C_S(obj);
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data = i2c_byte_read_t(&obj_s->my_i2c, last);
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return data;
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}
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int i2c_byte_write(i2c_t *obj, int data)
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{
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int32_t result = 0;
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struct i2c_s *obj_s = I2C_S(obj);
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result = i2c_byte_write_t(&obj_s->my_i2c, data);
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return result;
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}
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void i2c_slave_mode(i2c_t *obj, int enable_slave)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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obj_s->is_master = 0;
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i2c_slave_mode_t(&obj_s->my_i2c, enable_slave);
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}
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void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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i2c_slave_address_t(&obj_s->my_i2c, address);
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}
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int i2c_slave_receive(i2c_t *obj)
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{
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int32_t result = 0;
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struct i2c_s *obj_s = I2C_S(obj);
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result = i2c_slave_receive_t(&obj_s->my_i2c);
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return result;
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}
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int i2c_slave_read(i2c_t *obj, char *data, int length)
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{
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int32_t count = 0;
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struct i2c_s *obj_s = I2C_S(obj);
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count = i2c_slave_read_t(&obj_s->my_i2c, (uint8_t *)data, length);
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return count;
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}
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int i2c_slave_write(i2c_t *obj, const char *data, int length)
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{
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int32_t count = 0;
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struct i2c_s *obj_s = I2C_S(obj);
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count = i2c_slave_write_t(&obj_s->my_i2c, (uint8_t *)data, length);
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return count;
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}
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const PinMap *i2c_master_sda_pinmap()
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{
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return PinMap_I2C_SDA;
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}
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const PinMap *i2c_master_scl_pinmap()
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{
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return PinMap_I2C_SCL;
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}
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const PinMap *i2c_slave_sda_pinmap()
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{
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return PinMap_I2C_SDA;
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}
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const PinMap *i2c_slave_scl_pinmap()
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{
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return PinMap_I2C_SCL;
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}
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#if DEVICE_I2C_ASYNCH
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void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address,
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uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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obj_s->event_mask = event;
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//Set irqn table for future use
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set_i2c(obj_s->index, &obj_s->my_i2c.info.irqn);
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NVIC_SetVector(obj_s->irqn, handler);
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i2c_transfer_asynch_t(&obj_s->my_i2c, (uint8_t *)tx, tx_length, (uint8_t *)rx, rx_length, address, stop);
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}
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uint32_t i2c_irq_handler_asynch(i2c_t *obj)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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uint32_t event = 0;
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event = i2c_irq_handler_asynch_t(&obj_s->my_i2c);
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return (event & obj_s->event_mask);
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}
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uint8_t i2c_active(i2c_t *obj)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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uint8_t ret = (obj_s->my_i2c.info.asynch.state != I2C_TRANSFER_STATE_IDLE);
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return ret;
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}
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void i2c_abort_asynch(i2c_t *obj)
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{
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struct i2c_s *obj_s = I2C_S(obj);
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i2c_abort_asynch_t(&obj_s->my_i2c);
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}
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#endif // #if DEVICE_I2C_ASYNCH
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#endif // #if DEVICE_I2C
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