89 lines
3.3 KiB
C
89 lines
3.3 KiB
C
/*
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* Copyright (c) 2017-2020 Arm Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __MUSCA_B1_CMSIS_H__
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#define __MUSCA_B1_CMSIS_H__
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/* Processor and Core Peripherals and Configurations */
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/* ========================================================================== */
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/* ============= Processor and Core Peripheral Section ============= */
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/* ========================================================================== */
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/* ----- Start of section using anonymous unions and disabling warnings ----- */
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#if defined (__CC_ARM)
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#pragma push
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#pragma anon_unions
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#elif defined (__ICCARM__)
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#pragma language=extended
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#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic push
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#pragma clang diagnostic ignored "-Wc11-extensions"
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#pragma clang diagnostic ignored "-Wreserved-id-macro"
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#elif defined (__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined (__TMS470__)
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/* anonymous unions are enabled by default */
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#elif defined (__TASKING__)
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#pragma warning 586
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#elif defined (__CSMC__)
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/* anonymous unions are enabled by default */
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#else
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#warning Not supported compiler type
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#endif
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/* ----- Configuration of the Cortex-M33 Processor and Core Peripherals ----- */
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/* ----- This configuration can be applied to either of the cores ----------- */
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#define __CM33_REV 0x0002U /* Core revision r0p2 */
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#define __SAUREGION_PRESENT 1U /* SAU regions present */
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#define __MPU_PRESENT 1U /* MPU present */
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#define __VTOR_PRESENT 1U /* VTOR present */
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#define __NVIC_PRIO_BITS 4U /* Number of Bits used for the
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* Priority Levels */
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#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick
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* Config is used */
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#define __FPU_PRESENT 1U /* FPU present */
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#define __DSP_PRESENT 1U /* DSP extension present */
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#include "system_core_init.h"
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#include "platform_irq.h"
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#include <core_cm33.h> /*!< ARM Cortex-M33 processor and core peripherals */
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/* ------ End of section using anonymous unions and disabling warnings ------ */
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#if defined (__CC_ARM)
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#pragma pop
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#elif defined (__ICCARM__)
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/* leave anonymous unions enabled */
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#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic pop
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#elif defined (__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined (__TMS470__)
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/* anonymous unions are enabled by default */
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#elif defined (__TASKING__)
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#pragma warning restore
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#elif defined (__CSMC__)
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/* anonymous unions are enabled by default */
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#else
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#warning Not supported compiler type
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#endif
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#if defined(TARGET_MUSCA_B1)
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#include "cmsis_nvic.h"
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#endif
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#endif /*__MUSCA_B1_CMSIS_H__ */
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