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167 lines
5.8 KiB
C
167 lines
5.8 KiB
C
/***************************************************************************/ /**
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* \file cyhal_opamp.c
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*
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* \brief
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* Provides a high level interface for interacting with the Cypress Analog/Digital
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* convert. This interface abstracts out the chip specific details. If any chip
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* specific functionality is necessary, or performance is critical the low level
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* functions can be used directly.
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*
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********************************************************************************
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* \copyright
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* Copyright 2018-2021 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*******************************************************************************/
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#include "cyhal_opamp.h"
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#include "cyhal_gpio.h"
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#include "cyhal_analog_common.h"
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#include "cyhal_hwmgr.h"
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#include "cy_ctb.h"
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/**
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* \addtogroup group_hal_impl_opamp Opamp
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* \ingroup group_hal_impl
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*
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* \section group_hal_impl_opamp_power Power Level Mapping
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* The following table shows how the HAL-defined power levels map to the hardware-specific power levels
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* | HAL Power Level | Opamp Power Level |
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* | ------------------------------ | ------------------- |
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* | @ref CYHAL_POWER_LEVEL_HIGH | CY_CTB_POWER_HIGH |
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* | @ref CYHAL_POWER_LEVEL_MEDIUM | CY_CTB_POWER_MEDIUM |
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* | @ref CYHAL_POWER_LEVEL_LOW | CY_CTB_POWER_LOW |
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* | @ref CYHAL_POWER_LEVEL_DEFAULT | CY_CTB_POWER_MEDIUM |
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*
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*/
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#if defined(CY_IP_MXS40PASS_CTB_INSTANCES)
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static const cy_stc_ctb_opamp_config_t cyhal_opamp_default_config =
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{
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.deepSleep = CY_CTB_DEEPSLEEP_ENABLE,
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.oaPower = CY_CTB_POWER_OFF,
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.oaMode = CY_CTB_MODE_OPAMP10X,
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.oaPump = CY_CTB_PUMP_ENABLE,
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.oaCompEdge = CY_CTB_COMP_EDGE_DISABLE,
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.oaCompLevel = CY_CTB_COMP_DSI_TRIGGER_OUT_LEVEL,
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.oaCompBypass = CY_CTB_COMP_BYPASS_SYNC,
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.oaCompHyst = CY_CTB_COMP_HYST_DISABLE,
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.oaCompIntrEn = true,
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};
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/* PCoC6 supports only one CTB block */
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#if (CY_IP_MXS40PASS_CTB_INSTANCES > 1)
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#error "Unhandled CTB count"
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#endif
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#if defined(__cplusplus)
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extern "C"
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{
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#endif
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cy_rslt_t cyhal_opamp_init(cyhal_opamp_t *obj, cyhal_gpio_t vin_p, cyhal_gpio_t vin_m, cyhal_gpio_t vout)
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{
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/* Check if obj is free */
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CY_ASSERT(NULL != obj);
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/* Initial values */
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cy_rslt_t result = CY_RSLT_SUCCESS;
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memset(obj, 0, sizeof(cyhal_opamp_t));
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obj->base = NULL;
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obj->resource.type = CYHAL_RSC_INVALID;
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obj->is_init_success = false;
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/* Validate input pins. vin_p and vout are mandatory pins, vin_m is optional. */
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if ((NC == vin_p) || (NC == vout))
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{
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result = CYHAL_OPAMP_RSLT_ERR_INVALID_PIN;
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}
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/* Allocate resources */
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if(CY_RSLT_SUCCESS == result)
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{
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result = _cyhal_opamp_init_common(&(obj->resource), CYHAL_OPAMP_RSLT_BAD_ARGUMENT, vin_p, vin_m, vout, NC /* comp_out unused by opamp */);
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}
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/* Configure the opamp */
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if (result == CY_RSLT_SUCCESS)
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{
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obj->pin_vin_p = vin_p;
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obj->pin_vin_m = vin_m;
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obj->pin_vout = vout;
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obj->base = _cyhal_ctb_base[(obj->resource.block_num / _CYHAL_OPAMP_PER_CTB)];
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result = Cy_CTB_OpampInit(obj->base, _cyhal_opamp_convert_sel(obj->resource.block_num), &cyhal_opamp_default_config);
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obj->is_init_success = true;
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}
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if (result == CY_RSLT_SUCCESS)
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{
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/* Initialize the programmable analog */
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cyhal_analog_ctb_init(obj->base);
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/* OPAMP Routing. Close input switches for OA0 or OA1. */
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Cy_CTB_SetAnalogSwitch(obj->base, _cyhal_opamp_convert_switch(obj->resource.block_num), _cyhal_opamp_pin_to_mask(obj->resource.block_num % _CYHAL_OPAMP_PER_CTB, vin_p, vin_m, vout), CY_CTB_SWITCH_CLOSE);
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_cyhal_opamp_set_isolation_switch(obj->resource.block_num % _CYHAL_OPAMP_PER_CTB, obj->base, CY_CTB_SWITCH_CLOSE);
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obj->is_init_success = true;
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}
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/* Free OPAMP in case of failure */
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if (result != CY_RSLT_SUCCESS)
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{
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cyhal_opamp_free(obj);
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}
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return result;
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}
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cy_rslt_t cyhal_opamp_set_power(cyhal_opamp_t *obj, cyhal_power_level_t power)
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{
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/* Safe convert power level from HAL (cyhal_power_level_t) to PDL (cy_en_ctb_power_t) */
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cy_en_ctb_power_t power_level = (cy_en_ctb_power_t)_cyhal_opamp_convert_power(power);
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Cy_CTB_SetPower(obj->base, _cyhal_opamp_convert_sel(obj->resource.block_num), power_level, CY_CTB_PUMP_ENABLE);
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return CY_RSLT_SUCCESS;
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}
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void cyhal_opamp_free(cyhal_opamp_t *obj)
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{
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if (NULL != obj && NULL != obj->base)
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{
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if (obj->is_init_success && (!cyhal_opamp_set_power(obj, CYHAL_POWER_LEVEL_OFF)))
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{
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Cy_CTB_SetAnalogSwitch(obj->base, _cyhal_opamp_convert_switch(obj->resource.block_num), _cyhal_opamp_pin_to_mask(obj->resource.block_num % _CYHAL_OPAMP_PER_CTB, obj->pin_vin_p, obj->pin_vin_m, obj->pin_vout), CY_CTB_SWITCH_OPEN);
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_cyhal_opamp_set_isolation_switch(obj->resource.block_num % _CYHAL_OPAMP_PER_CTB, obj->base, CY_CTB_SWITCH_OPEN);
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cyhal_analog_ctb_free(obj->base);
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}
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}
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if(CYHAL_RSC_INVALID != obj->resource.type)
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{
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cyhal_hwmgr_free(&obj->resource);
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obj->base = NULL;
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obj->resource.type = CYHAL_RSC_INVALID;
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}
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_cyhal_utils_release_if_used(&(obj->pin_vin_p));
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_cyhal_utils_release_if_used(&(obj->pin_vout));
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_cyhal_utils_release_if_used(&(obj->pin_vin_m));
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}
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#if defined(__cplusplus)
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}
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#endif
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#endif /* CY_IP_MXS40PASS_CTB_INSTANCES */
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