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93 lines
6.2 KiB
XML
93 lines
6.2 KiB
XML
<?xml version="1.0" encoding="utf-8"?>
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<!--****************************************************************************
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* \file dpslp.cypersonality
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* \version 1.0
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*
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* \brief
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* Deep Sleep Clock personality description file.
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*
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********************************************************************************
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* \copyright
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* Copyright 2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*****************************************************************************-->
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<Personality id="mxs40dpslp" name="Deep Sleep Clock" version="1.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v3">
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<Dependencies>
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<IpBlock name="mxs40pass_ver2" />
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<Resource name="pass\.dpslp"/>
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<!--DependentResource name="pass.sar" /-->
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</Dependencies>
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<ExposedMembers>
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<ExposedMember key="frequency" paramId="frequency" />
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<ExposedMember key="accuracy" paramId="accuracy" />
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<ExposedMember key="error" paramId="error" />
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<ExposedMember key="clock" paramId="clock" />
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</ExposedMembers>
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<Parameters>
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<!-- PDL documentation -->
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<ParamDoc id="pdlDoc" name="Configuration Help" group="Peripheral Documentation" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__sysanalog.html" linkText="Open SysAnalog Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" />
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<ParamChoice id="clock" name="Clock Source" group="General" default="CY_SYSANALOG_DEEPSLEEP_SRC_LPOSC" visible="true" editable="true" desc="Select the clock source for the opamp pump clock." >
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<Entry name="LPOSC" value="CY_SYSANALOG_DEEPSLEEP_SRC_LPOSC" visible="true" />
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<Entry name="CLK_MF" value="CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF" visible="true" />
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</ParamChoice>
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<ParamString id="sourceClockRsc" name="sourceClockRsc" group="Internal" default="`${clock eq CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF ? "srss[0].clock[0].mfclk[0]" : "pass[0].lposc[0]"}`" visible="false" editable="false" desc="" />
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<ParamBool id="error" name="Clock Error" group="Internal" default="`${!isBlockUsed(sourceClockRsc)}`" visible="false" editable="false" desc="" />
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<ParamRange id="sourceFreq" name="Source Frequency" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, "frequency") : 0}`" min="0" max="8000000" resolution="1" visible="false" editable="false" desc="" />
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<ParamString id="accuracy" name="accuracy" group="Internal" default="`${!error ? getExposedMember(sourceClockRsc, "accuracy") : 0}`" visible="false" editable="false" desc="" />
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<ParamString id="sourceFrequencyInfo" name="Source Frequency" group="General" default="`${formatFrequency(sourceFreq,accuracy)}`" visible="true" editable="false" desc="Source clock frequency" />
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<ParamChoice id="dsclkdiv" name="Clock Divider" group="General" default="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4" visible="true" editable="true" desc="Select the clock source for the opamp pump clock." >
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<Entry name="1" value="CY_SYSANALOG_DEEPSLEEP_CLK_NO_DIV" visible="`${clock eq CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF}`"/>
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<Entry name="2" value="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_2" visible="`${clock eq CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF}`"/>
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<Entry name="4" value="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4" visible="true"/>
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<Entry name="8" value="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_8" visible="true"/>
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<Entry name="16" value="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_16" visible="true"/>
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</ParamChoice>
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<ParamRange id="divider" name="divider" group="Internal" default="`${dsclkdiv eq CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_2 ? 2 :
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dsclkdiv eq CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4 ? 4 :
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dsclkdiv eq CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_8 ? 8 :
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dsclkdiv eq CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_16 ? 16 : 1}`" min="1" max="16" resolution="1" visible="false" editable="false" desc="Sets divider value for the Deep Sleep clock source" />
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<ParamRange id="frequency" name="Frequency" group="Internal" default="`${sourceFreq / divider}`" min="0" max="8000000" resolution="1" visible="false" editable="false" desc="" />
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<ParamString id="frequencyInfo" name="Frequency" group="General" default="`${formatFrequency(frequency,accuracy)}`" visible="true" editable="false" desc="The resulting Deep Sleep Clock frequency" />
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<ParamString id="mfoRcs" name="mfoRcs" group="Internal" default="srss[0].clock[0].mfo[0]" visible="false" editable="false" desc="" />
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</Parameters>
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<DRCs>
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<DRC type="ERROR" text="Source clock for Deep Sleep Clock is not enabled" condition="`${error}`" >
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<FixIt action="ENABLE_BLOCK" target="`${sourceClockRsc}`" value="" valid="true" />
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</DRC>
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<DRC type="ERROR" text="MFO Deep Sleep support should be enabled" condition="`${(clock eq "CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF") ? ((isBlockUsed(mfoRcs)) ? (!getExposedMember(mfoRcs, "dsen")) : false) : (false)}`" >
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</DRC>
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<DRC type="ERROR" text="The Deep Sleep Clock frequency should not be greater than 2 MHz" condition="`${frequency > 2000000}`" >
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<FixIt action="SET_PARAM" target="dsclkdiv" value="CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4" valid="true" />
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</DRC>
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</DRCs>
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<ConfigFirmware>
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<ConfigInclude value="cy_sysanalog.h" include="true" />
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<ConfigDefine name="CY_CFG_SYSANALOG_DEEPSLEEP_SRC" value="`${clock}`" public="true" include="true" />
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<ConfigDefine name="CY_CFG_SYSANALOG_DEEPSLEEP_DIV" value="`${dsclkdiv}`" public="true" include="true" />
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</ConfigFirmware>
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</Personality>
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